JAJSHR4B August   2019  – April 2020 AMC1336

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. Table 1.  Absolute Maximum Ratings
    2. Table 2.  ESD Ratings
    3. Table 3.  Recommended Operating Conditions
    4. Table 4.  Thermal Information
    5. Table 5.  Power Ratings
    6. Table 6.  Insulation Specifications
    7. Table 7.  Safety-Related Certifications
    8. Table 8.  Safety Limiting Values
    9. Table 9.  Electrical Characteristics
    10. Table 10. Switching Characteristics
    11. 6.1       Insulation Characteristics Curves
    12. 6.2       Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Clock Input
      5. 7.3.5 Digital Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Behavior in Case of a Full-Scale Input
      2. 7.4.2 AVDD Diagnostics and Fail-Safe Output
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Digital Filter Usage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
      4. 8.2.4 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デバイスの項目表記
        1. 11.1.1.1 絶縁の用語集
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

7.3.1 Analog Input

The AMC1336 incorporates front-end circuitry that contains an instrumentation amplifier, followed by a ΔΣ modulator. To support a bipolar input range with a unipolar high-side supply AVDD, the device uses a charge pump to simplify the overall system design and minimize circuit cost. For reduced offset and offset drift, the input buffer is chopper-stabilized with the switching frequency set at fCLKIN / 32. Figure 39 illustrates the spur created by the switching frequency.

AMC1336 D037_SBAS951.gif
sinc3 filter, OSR = 1, fCLKIN = 20 MHz, fIN = 1 kHz
Figure 39. Quantization Noise Shaping

The linearity and noise performance of the device are ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR), that is ±1 V, and within the specified input common-mode range.

Figure 40 shows the specified common-mode input voltage that applies for the full-scale input voltage range as specified in this document.

If smaller input signals are used, the operational common-mode input voltage range widens. Figure 41 shows the common-mode input voltage that applies with no differential input signal; that is, when the voltage applied on AINP is equal to the voltage applied on AINN. The common-mode input voltage range scales with the actual differential input voltage between this range and the range in Figure 40.

AMC1336 ai_Vcm_FS_bas951.gif
Figure 40. Common-Mode Input Voltage Range With a
Clipping Differential Input Signal of ±1.25 V
AMC1336 ai_Vcm_no_input_bas951.gif
Figure 41. Common-Mode Input Voltage Range With a
Zero Differential Input Signal

There are two restrictions on the analog input signals (AINP and AINN). First, if the input voltage exceeds the range AGND – 5 V to AVDD + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on. In addition, the linearity and noise performance of the device are ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR) and within the specified input common-mode range.