In primary-secondary mode, the RT pin of the primary device must be left floating. This sets the internal switching frequency of the device, f_SW to a typical 500 kHz and the SYNC1 pin becomes an output clock at the same frequency and phase as f_SW. In addition, the SYNC2 pin becomes an output clock at the same frequency but at 90° out of phase with respect to SYNC1. This SYNC1 and SYNC2 output clock signals, in combination with the state of the SYNC2 pins of the secondary devices, can be used to connect 2, 3, or 4 devices in parallel configuration. Figure 8-5 shows the SYNC1 and SYNC2 clock signals when the RT pin is floating in the primary device and how the signals can be used to generate the 90° out of phase clocks needed to connect 4 devices in parallel configuration (1 primary and 3 secondaries). The SYNC1b and SYNC2b indicate the clock signals being inverted either internally or due to the state of the SYNC2 pin in the secondary devices. When SYNC2 is connected to GND, the inverse functionality of the input clock signal in SYNC1 remains the same. When SYNC2 is connected to VIN, the input clock signal in SYNC1 does not get inverted. The RT pin of the secondary devices must have a resistor to GND corresponding to 500 kHz as indicated in Equation 4 and Figure 8-4. Low tolerance resistor values should be used for this purpose as this is necessary for proper slope compensation.

Figure 8-6 shows the SYNC1 and SYNC2 output signals from the primary device as well as signals and connections needed to operate 4 devices in parallel configuration. The f_SW clock signal by each device represents the switching frequency signal for the respective device.

The 3 modes previously described are summarized in Table 8-1.