JAJSJY2B june   2021  – march 2023 TCA39306

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Definition of threshold voltage
      2. 8.1.2 Correct Device Set Up
      3. 8.1.3 Disconnecting a Responder from the Main Bus Using the EN Pin
      4. 8.1.4 Supporting Remote Board Insertion to Backplane with TCA39306
      5. 8.1.5 Switch Configuration
      6. 8.1.6 Controller on Side 1 or Side 2 of Device
      7. 8.1.7 LDO and TCA39306 Concerns
      8. 8.1.8 Current Limiting Resistance on VREF2
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable (EN) Pin
      2. 8.3.2 Voltage Translation
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 General Applications of I2C
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bidirectional Voltage Translation
        2. 9.2.2.2 Sizing Pullup Resistors
        3. 9.2.2.3 Bandwidth
      3. 9.2.3 Application Curve
    3. 9.3 Systems Examples: I3C Usage Considerations
      1. 9.3.1 I3C Bus Switching
      2. 9.3.2 I3C Bus Voltage Translation
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  11. 11Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK Input clamp voltage II = -18 mA EN = 0 V -1.2 0 V
IIH Input leakage current VI = 5 V, VO = 0V EN = 0 V 5 µA
VT Threshold voltage IO = 500 µA VI = 0.1 V, VO = 0 V, Find VEN where IO = 500 µA 0.7 1.0 V
CI(EN) Input capacitance VI = 3 V or 0 V 11 pF
CIO(off) Off capacitance SCLn, SDAn VO = 3 V or 0 V EN = 0 V 4 6 pF
CIO(on) On capacitance SCLn, SDAn VO = 3 V or 0 V EN = 3 V 10.5 12.5 pF
RON(2) On-state resistance SCLn, SDAn (-40 to 125C) VI = 0 V(3) IO = 64 mA EN = 4.5 V 3.5 5.5 Ω
VI = 0 V(3) IO = 64 mA EN = 3 V 4.7 7 Ω
VI = 0 V(3) IO = 64 mA EN = 2.3 V 6.3 9.5 Ω
VI = 0 V(3) IO = 15 mA EN = 1.5 V 25.5 32 Ω
VI = 2.4 V(4) IO = 15 mA EN = 4.5 V 1 6 15 Ω
VI = 2.4 V(4) IO = 15 mA EN = 3 V 20 50 75 Ω
VI = 1.7 V(4) IO = 15 mA EN = 2.3 V 20 55 75 Ω
RON On-state resistance SCLn, SDAn VI = 0 V, VCC2 = 5 V(5) IO = 64 mA VCC1 = 1 V 5 25 Ω
VCC1 = 1.8 V 4 10
VCC1 = 2.5 V 3 8
VCC1 = 3.3 V 3 7
IO = 32 mA VCC1 = 1 V 5 10 Ω
VCC1 = 1.8 V 4 9
VCC1 = 2.5 V 3 8
VCC1 = 3.3 V 3 7
VI = 1.8 V, VCC2 = 5 V(5) IO = 15 mA VCC1 = 3.3 V 4 13 Ω
VI = 1 V, VCC2 = 3.3 V(5) IO = 10 mA VCC1 = 1.8 V 7 24 Ω
VI = 0 V, VCC2 = 3.3 V(5) IO = 10 mA VCC1 = 1 V 5 18 Ω
VI = 0 V, VCC2 = 1.8 V(5) IO = 10 mA VCC1 = 1 V 6 19 Ω
(1) All typical values are at TA = 25°C.
(2) Measured by the voltage drop between the SCL1 and SCL2, or SDA1 and SDA2 terminals, at the indicated current through the switch. Minimum ON-state resistance is determined by the lowest voltage of the two terminals.
(3) Measured in current source configuration only. See Figure 7-1
(4) Measured in current sink configuration only. See Figure 7-1
(5) Measured in application connected current source configuration only. See Figure 7-2