JAJSKF5D September   2021  – November 2024 TPSM82864A , TPSM82866A

PRODMIX  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Optimized Transient Performance from PWM to PSM Operation
      4. 7.3.4 Low Dropout Operation (100% Duty Cycle)
      5. 7.3.5 Soft Start
      6. 7.3.6 Switch Current Limit and HICCUP Short-Circuit Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Output Discharge
      3. 7.4.3 Power Good (PG)
      4. 7.4.4 Output Voltage and Mode Selection (VSET/MODE)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting The Output Voltage
        2. 8.2.2.2 Input and Output Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
        1. 8.4.2.1 Thermal Considerations
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Layout Guidelines

A proper layout is critical for the operation of any switched mode power supply, especially at high switching frequencies. Therefore, the PCB layout of the TPSM8286xA demands careful attention to make sure of best performance. A poor layout can lead to issues like the following:

  • Bad line and load regulation
  • Instability
  • Increased EMI radiation
  • Noise sensitivity

Refer to the Five Steps to a Great PCB Layout for a Step-Down Converter Technical Brief for a detailed discussion of general best practices. The following are specific recommendations for the TPSM8286xA:

  • Place the input capacitor as close as possible to the VIN and PGND pins of the device. This placement is the most critical component placement. Route the input capacitor directly to the VIN and PGND pins avoiding vias.
  • Place the output capacitor close to the VOUT and PGND pins and route directly avoiding vias.
  • Place the FB resistors R1 and R2 close to the FB and AGND pins and place R4 close to the VSET/MODE pin to minimize noise pickup.
  • The sense traces connected to the VOS pin is a signal trace. Take special care to avoid noise being induced. Keep the trace away from SW.
  • To improve thermal performance, use GND vias under the exposed thermal pad. Directly connect the AGND and PGND pins to the exposed thermal pad with copper on the top PCB layer.
  • Refer to Figure 8-44 and Figure 8-45 for an example of component placement, routing, and thermal design.
  • The recommended land pattern for the TPSM8286xA is shown at the end of this data sheet. For best manufacturing results, create the pads as solder mask defined (SMD) when some pins (such as VIN, VOUT, and PGND) are connected to large copper planes. Using SMD pads keeps each pad the same size and avoids solder pulling the device during reflow.