JAJSKF5D September 2021 – November 2024 TPSM82864A , TPSM82866A
PRODMIX
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY | ||||||
IQ_VIN | Quiescent current into VIN pin | EN = High, no load, device not switching | 4 | 10 | µA | |
IQ_VOS | Quiescent current into VOS pin | EN = High, no load, device not switching, VVOS = 1.8 V | 8 | µA | ||
ISD | Shutdown current | EN = Low, TJ = -40℃ to 85℃ |
0.24 | 1 | µA | |
VUVLO | Undervoltage lockout threshold | VIN rising | 2.2 | 2.3 | 2.4 | V |
VIN falling | 2.1 | 2.2 | 2.3 | V | ||
TJSD | Thermal shutdown threshold | TJ rising | 150 | °C | ||
Thermal shutdown hysteresis | TJ falling | 20 | °C | |||
LOGIC INTERFACE | ||||||
VIH | High-level input threshold voltage at EN and VSET/MODE | 1.0 | V | |||
VIL | Low-level input threshold voltage at EN and VSET/MODE | 0.4 | V | |||
IEN,LKG | Input leakage current into EN pin | 0.01 | 0.1 | µA | ||
START-UP, POWER GOOD | ||||||
tDelay | Enable delay time | Time from EN high to device starts switching with a 249-kΩ resistor connected between VSET/MODE and GND | 420 | 650 | 1100 | µs |
tRamp | Output voltage ramp time | Time from device starts switching to power good | 0.8 | 1 | 1.5 | ms |
VPG(low) | Power-good lower threshold | VFB referenced to VFB(nominal) | 85 | 91 | 96 | % |
VPG(high) | Power-good upper threshold | VFB referenced to VFB(nominal) | 103 | 111 | 120 | % |
VPG,OL | Low-level output voltage | Isink = 1 mA | 0.4 | V | ||
IPG,LKG | Input leakage current into PG pin | VPG = 5.0 V | 0.01 | 0.1 | µA | |
tPG,DLY | Power good delay | Rising and falling edges | 34 | µs | ||
OUTPUT | ||||||
VOUT | Output voltage accuracy | Fixed voltage operation, FPWM, no load, TJ = 0°C to 85°C | –1 | 1 | % | |
Fixed voltage operation, FPWM, no load | –2 | 2 | % | |||
VFB | Feedback voltage | Adjustable voltage operation | 594 | 600 | 606 | mV |
IFB,LKG | Input leakage into FB pin | Adjustable voltage operation, VFB = 0.6 V | 0.01 | 0.4 | µA | |
RDIS | Output discharge resistor at VOS pin | 3.5 | Ω | |||
Load regulation | VOUT = 1.2 V, FPWM | 0.04 | %/A | |||
POWER SWITCH | ||||||
RDP | Dropout resistance |
TPSM8286xAA0SRDJ 100% mode. VIN = 3.3 V, TJ = 25°C |
28 | 35 | mΩ | |
TPSM8286xAA0PRCF 100% mode. VIN = 3.3 V, TJ = 25°C |
26 | mΩ | ||||
TPSM8286xAA0HRDM 100% mode. VIN = 3.3 V, TJ = 25°C |
26 | mΩ | ||||
ILIM | High-side FET forward current limit | TPSM82864A | 5 | 5.5 | 6 | A |
TPSM82866A | 7 | 7.9 | 9 | A | ||
Low-side FET forward current limit | TPSM82864A | 4.5 | A | |||
TPSM82866A | 6.5 | A | ||||
Low-side FET negative current limit | –3 | A | ||||
fSW | PWM switching frequency | TPSM82866Ax, IOUT = 1 A, VOUT = 1.2 V | 2.4 | MHz |