JAJSKZ0A August 2021 – May 2022 ADC08DJ5200RF
PRODUCTION DATA
ADC08DJ5200RF can be used as a dual-channel ADC where the sampling rate is equal to the clock frequency (fS = fCLK) provided at the CLK+ and CLK– pins. The two inputs, AIN± and BIN±, serve as the respective inputs for each channel in this mode. This mode is chosen simply by setting JMODE to the appropriate setting for the desired configuration as described in . The analog inputs can be swapped by setting DUAL_INPUT (see the input mux control register). One channel can be powered down to operate ADC08DJ5200RF as a single channel at the maximum sampling rate of dual channel mode to save power compared to single channel mode operating at half the rate.