JAJSL36A May   2021  – September 2021 AMC1411

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Insulation Coordination
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Differential-to-Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What To Do and What Not To Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

6.13 Typical Characteristics

at VDD1 = 5 V, VDD2 = 3.3 V, SHTDN = 0 V, fIN = 10 kHz, and BW = 100 kHz (unless otherwise noted)

 
 
Figure 6-5 Input Offset Voltage vs Supply Voltage
VDD1 = 3.3 V
Figure 6-7 Input Offset Voltage vs Temperature
 
Figure 6-9 Input Bias Current vs Temperature
 
Figure 6-11 Output Voltage vs Input Voltage
 
Figure 6-13 Output Phase vs Input Frequency
 
Figure 6-15 Gain Error vs Temperature
 
Figure 6-17 Nonlinearity vs Supply Voltage
 
Figure 6-19 Total Harmonic Distortion vs Supply Voltage
 
Figure 6-21 Signal-to-Noise Ratio vs Input Voltage
 
Figure 6-23 Signal-to-Noise Ratio vs Temperature
100-mV ripple
Figure 6-25 Power-Supply Rejection Ratio vs Ripple Frequency
 
Figure 6-27 Output Common-Mode Voltage vs Temperature
 
Figure 6-29 Output Bandwidth vs Temperature
 
Figure 6-31 Supply Current vs Temperature
 
Figure 6-33 Output Rise and Fall Time vs Temperature
 
Figure 6-35 IN to OUTP, OUTN Signal Delay vs Temperature
VDD1 = 5 V
Figure 6-6 Input Offset Voltage vs Temperature
 
Figure 6-8 Input Bias Current vs High-Side Supply Voltage
 
Figure 6-10 Input Capacitance vs Input Signal Frequency
 
Figure 6-12 Normalized Gain vs Input Frequency
 
Figure 6-14 Gain Error vs Supply Voltage
 
 
Figure 6-16 Nonlinearity vs Input Voltage
 
Figure 6-18 Nonlinearity vs Temperature
 
Figure 6-20 Total Harmonic Distortion vs Temperature
 
 
Figure 6-22 Signal-to-Noise Ratio vs Supply Voltage
 
 
Figure 6-24 Input-Referred Noise Density vs Frequency
 
Figure 6-26 Output Common-Mode Voltage vs Low-Side Supply Voltage
 
Figure 6-28 Output Bandwidth vs Low-Side Supply Voltage
 
Figure 6-30 Supply Current vs Supply Voltage
 
 
Figure 6-32 Output Rise and Fall Time vs Low-Side Supply Voltage
 
Figure 6-34 IN to OUTP, OUTN Signal Delay vs Low-Side Supply Voltage