JAJSLC9A February   2021  – August 2021 TCA9416

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Voltage Waveforms
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Enable and Disable
      3. 8.3.3 Pull up resistors on I/O Lines
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Startup Considerations with Large Capacitive Load Mismatches
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary

10 Power Supply Recommendations

The TCA9416 has no supply restrictions outside of the 1.08 V to 3.6 V range. VCCA can be higher than or lower than VCCB. The internal circuitry will select the appropriate supply automatically to correctly support translation. VCCA can also be the same as VCCB, and the device can be used as a buffer.

The sequencing of each power supply does not damage the device during the power up operation, so either power supply can be ramped up first. The output-enable (OE) input circuit is designed so that when the (OE) input is low, the outputs are disabled. No signals may propagate, and the rise time and fall time accelerators are disabled, but the internal pull up resistors will remain unaffected. To make sure the signals do not pass through during power up or power down, the OE input pin must be tied to GND through a pull down resistor and should not be enabled until VCCA and VCCB are fully ramped and stable. If OE is tied to VCCA, this is OK, but might result in a glitch on the bus during power up depending on the capacitive load and ramp rates. The minimum value of the pull down resistor to ground is determined by the current-sourcing capability of the driver.