JAJSLE9A March   2023  – April 2024 OPA928

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: 4.5V ≤ VS < 8V
    6. 5.6 Electrical Characteristics: 8V ≤ VS ≤ 16V
    7. 5.7 Electrical Characteristics: 16V < VS ≤ 36V
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Guard Buffer
      2. 6.3.2 Input Protection
      3. 6.3.3 Thermal Protection
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 EMI Rejection
      6. 6.3.6 Common-Mode Voltage Range
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Contamination Considerations
      2. 7.1.2 Guarding Considerations
      3. 7.1.3 Single-Supply Considerations
      4. 7.1.4 Humidity Considerations
      5. 7.1.5 Dielectric Relaxation
      6. 7.1.6 Shielding
    2. 7.2 Typical Applications
      1. 7.2.1 High-Impedance Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Transimpedance Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Input Bias
          2. 7.2.2.2.2 Offset Voltage
          3. 7.2.2.2.3 Stability
          4. 7.2.2.2.4 Noise
      3. 7.2.3 Improved Diode Limiter
      4. 7.2.4 Instrumentation Amplifier
    3. 7.3 Power-Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 8.1.1.3 TI のリファレンス・デザイン
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Common-Mode Voltage Range

The OPA928 is a 36V, rail-to-rail input and output op amp with an input common-mode range that extends 100mV beyond either supply rail. This wide range is achieved with paralleled complementary N-channel and P-channel differential input pairs. There is a small transition region, typically (V+) –3V to (V+) – 1.5V in which both input pairs are active and offset voltage and distortion performance can be degraded. The input bias performance is virtually unaffected in this region, but is subject to temperature variation. In inverting configurations, such as transimpedance applications, the input common-mode voltage is fixed and the transition region is easily avoided. In a buffer application, the small degradation of input offset performance in the transition region presents a negligible effect on the signal. In high, noninverting gain configurations, the common-mode voltage is limited to a small range and typically away from the transition region.

While the transition region is unlikely to affect most applications, there is an input common-mode limitation that directly affects the input bias current performance of the OPA928. Large input common-mode voltages can significantly degrade input bias current performance. If operating the device with a supply voltage greater than 20V, limit the input common-mode voltage to less than (V–) + 20V. See Figure 5-23 to Figure 5-28 for the recommended common-mode voltage range across different supply conditions.