JAJSLN2 November   2021 TPS7H1210-SEP

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Enable Pin Operation
      3. 7.3.3 Programmable Soft-Start
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Capacitor Recommendations
      3. 8.1.3 Noise Reduction and Feed-Forward Capacitor Requirements
      4. 8.1.4 Power-Supply Rejection Ratio (PSRR)
      5. 8.1.5 Output Noise
      6. 8.1.6 Transient Response
      7. 8.1.7 Post DC-DC Converter Filtering
      8. 8.1.8 Power for Precision Analog
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don’ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Performance
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

GUID-B65B924F-7174-402A-9526-B9ABDB7DEE57-low.png Figure 5-1 RGW Package,20-Pin VQFN(Top View)
Table 5-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
EN 13 I Enable. This dual-polarity pin turns the regulator on when |VEN| ≥ 2 V. The EN pin can be connected to IN if not used. If VEN is negative polarity, then keep |VEN| ≤ |VIN|.
FB 3 I Feedback. This pin is the input to the control-loop error amplifier. It is used to set the output voltage of the device and is normally equal to VREF (–1.182 V, typical) during operation.
GND 7 — Ground.
IN 15, 16 I Input supply. It is recommended to connect a 10-µF capacitor from IN to GND (as close to the device as possible).
NC 2, 4–6, 8–12, 17–19 — No connect. This pin is not internally connected. It is recommended to connect these pins to GND to prevent charge buildup; however, these pins can also be left open or tied to any voltage between GND and VIN.
NR_SS 14 — Noise reduction and soft start. A capacitor connected from this pin to GND controls the soft-start function and allows RMS noise to be reduced to very low levels. TI recommends connecting a 100-nF capacitor from NR_SS to GND (as close to the device as possible) to filter the noise generated by the internal band gap and maximize AC performance.
OUT 1, 20 O Output of the regulator. A capacitor greater than or equal to 10 µF must be tied from this pin to ground to ensure stability. TI recommends connecting a 47-µF ceramic capacitor from OUT to GND (as close to the device as possible) to maximize AC performance.
Thermal
Pad		 — — Connect the thermal pad to a large-area ground plane. The thermal pad is not internally grounded and it must be externally tied to GND for proper operation.
(1) I = Input, O = Output, — = Other