JAJSLN2 November   2021 TPS7H1210-SEP

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Enable Pin Operation
      3. 7.3.3 Programmable Soft-Start
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Capacitor Recommendations
      3. 8.1.3 Noise Reduction and Feed-Forward Capacitor Requirements
      4. 8.1.4 Power-Supply Rejection Ratio (PSRR)
      5. 8.1.5 Output Noise
      6. 8.1.6 Transient Response
      7. 8.1.7 Post DC-DC Converter Filtering
      8. 8.1.8 Power for Precision Analog
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don’ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Performance
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

6.6 Typical Characteristics

Over |VIN| = 3 V, IOUT = 1 mA, CIN = 20 µF, COUT = 20 µF, CNR_SS = 0 nF, FB tied to OUT, EN tied to IN, TA = 25°C, unless otherwise noted.

 
Figure 6-1 Reference Voltage vs Input Voltage
Across Temperature
 
Figure 6-3 Ground Current vs Input Voltage
Across Output Current
Figure 6-5 Ground Current vs Output Current
Across Temperature
IOUT = 0 mA
Figure 6-7 Quiescent Current vs Input Voltage
Across Temperature
IOUT = 500 mA CIN = 30 μF
Figure 6-9 Dropout Voltage vs Input Voltage
Across Temperature
VIN = –4.6 V VOUT(SET) = –5 V CIN = 30 μF
Figure 6-11 Dropout Voltage vs Temperature
Across Output Current
Each individual curve is normalized to 0% at VIN = –3 V
Figure 6-13 Line Regulation vs Input Voltage
Across Temperature
CNR_SS = 100 nF IOUT = 1 A CIN = 0 μF(A)
All curves have 100-nF and 10-nF capacitor on VOUT
Figure 6-15 Power-Supply Rejection Ratio vs Frequency Across COUT
COUT = 50.11 μF CNR_SS = 100 nF CIN = 0 μF(A)
 
Figure 6-17 Power-Supply Rejection Ratio vs Frequency Across Output Current
COUT = 50.11 μF CNR_SS = 100 nF CIN = 0 μF(A)
IOUT = 1 A VOUT = –5 V
|VIN| = |VOUT + VDO|, 3-V minimum
Figure 6-19 Power-Supply Rejection Ratio vs Frequency Across Dropout Voltage
COUT = 50.11 μF IOUT = 1 A CIN = 11.1 μF
VN = output noise RMS voltage (10-Hz to 100-kHz bandwidth)
Figure 6-21 Output Noise vs Frequency Across CNR_SS
(Noise Spectral Density)
COUT = 50.11 μF IOUT = 1 A CIN = 11.1 μF
|VIN| = |VOUT + VDO|, 3-V minimum
VN = output noise RMS voltage (10-Hz to 100-kHz bandwidth)
Figure 6-23 Output Noise vs Frequency Across Output Voltage
(Noise Spectral Density)
VIN = –15 V VOUT = –12 V IOUT (slew) = 1 A / 10 μs
CIN = 11.1 μF COUT = 50 μF CNR_SS = 100 nF
Figure 6-25 Load Step: 500 mA to 1 mA
IFB > 0 flows into the device
Figure 6-2 Feedback Leakage Current vs Temperature
Across Input Voltage
IOUT = 500 mA
Figure 6-4 Ground Current vs Input Voltage
Across Temperature
Figure 6-6 Enable Current vs Enable Voltage
Across Temperature
VEN = 0.4 V
Figure 6-8 Shutdown Current vs Input Voltage
Across Temperature
VIN = –4.6 V VOUT(SET) = –5 V CIN = 30 μF
Figure 6-10 Dropout Voltage vs Output Current
Across Temperature
 
Figure 6-12 Enable Threshold Voltage vs Temperature
Each individual curve is normalized to 0% at IOUT = 0 mA
Figure 6-14 Load Regulation vs Output Current
Across Temperature
COUT = 50.11 μF IOUT = 1 A CIN = 0 μF(A)
 
Figure 6-16 Power-Supply Rejection Ratio vs Frequency Across CNR_SS
COUT = 50.11 μF CNR_SS = 100 nF CIN = 0 μF(A)
IOUT = 1 A |VIN| = |VOUT + 1 V|, 3-V minimum
Figure 6-18 Power-Supply Rejection Ratio vs Frequency Across Output Voltage
COUT = 50.11 μF CNR_SS = 100 nF CIN = 11.1 μF
VN = output noise RMS voltage (10-Hz to 100-kHz bandwidth)
 
Figure 6-20 Output Noise vs Frequency Across Output Current
(Noise Spectral Density)
COUT = 50.11 μF IOUT = 1 mA CIN = 11.1 μF
VN = output noise RMS voltage (10-Hz to 100-kHz bandwidth)
Figure 6-22 Output Noise vs Frequency Across CNR_SS
(Noise Spectral Density)
VIN = –15 V VOUT = –12 V IOUT (slew) = 1 A / 10 μs
CIN = 11.1 μF COUT = 50 μF CNR_SS = 100 nF
Figure 6-24 Load Step: 1 mA to 500 mA
VIN(SET) = –15 V VOUT(SET) = –12 V CIN = 11.1 μF
COUT = 50 μF CNR_SS = 100 nF
Figure 6-26 Start-up with Soft-Start
A. CIN is removed as part of PSRR testing. During normal operation, follow the recommended operating condition of CIN ≥ 10 μF.