JAJSN29B october   2021  – march 2023 TMUX8211 , TMUX8212 , TMUX8213

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings: TMUX821x Devices
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions: TMUX821x Devices
    4. 7.4  ソースまたはドレイン連続電流
    5. 7.5  ドレイン・パルス電流のソース
    6. 7.6  Thermal Information
    7. 7.7  Electrical Characteristics (Global): TMUX821x Devices
    8. 7.8  Electrical Characteristics (±15-V Dual Supply)
    9. 7.9  Electrical Characteristics (±36-V Dual Supply)
    10. 7.10 Electrical Characteristics (±50-V Dual Supply)
    11. 7.11 Electrical Characteristics (72-V Single Supply)
    12. 7.12 Electrical Characteristics (100-V Single Supply)
    13. 7.13 Switching Characteristics: TMUX821x Devices
    14. 7.14 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 On-Resistance
    2. 8.2 Off-Leakage Current
    3. 8.3 On-Leakage Current
    4. 8.4 Device Turn-On and Turn-Off Time
    5. 8.5 Charge Injection
    6. 8.6 Off Isolation
    7. 8.7 Crosstalk
    8. 8.8 Bandwidth
    9. 8.9 THD + Noise
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Flat On-Resistance
      3. 9.3.3 Protection Features
        1. 9.3.3.1 Fail-Safe Logic
        2. 9.3.3.2 ESD Protection
        3. 9.3.3.3 Latch-Up Immunity
      4. 9.3.4 1.8 V Logic Compatible Inputs
      5. 9.3.5 Integrated Pull-Down Resistor on Logic Pins
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  14. 14Mechanical, Packaging, and Orderable Information

THD + Noise

The total harmonic distortion (THD) of a signal is a measurement of the harmonic distortion, and is defined as the ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency at the multiplexer output. The On-Resistance of the device varies with the amplitude of the input signal and results in distortion when the drain pin is connected to a low-impedance load. Total harmonic distortion plus noise is denoted as THD+N. Figure 8-9 shows the setup used to measure THD+N of the devices.

GUID-9E8A2FD3-9516-470A-B0CA-BAD1B5245AE2-low.gif Figure 8-9 THD+N Measurement Setup