JAJSNR9B April   2016  – April 2022 INA301-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Alert Output ( ALERT Pin)
      2. 7.3.2 Current-Limit Threshold
        1. 7.3.2.1 Resistor-Controlled Current Limit
          1. 7.3.2.1.1 Resistor-Controlled, Current-Limit Example
        2. 7.3.2.2 Voltage-Source-Controlled Current Limit
      3. 7.3.3 Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Mode
        1. 7.4.1.1 Transparent Output Mode
        2. 7.4.1.2 Latch Output Mode
  8. Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Selecting a Current-Sensing Resistor
        1. 8.1.1.1 Selecting a Current-Sensing Resistor Example
      2. 8.1.2 Input Filtering
      3. 8.1.3 INA301-Q1 Operation With Common-Mode Voltage Transients Greater Than 36 V
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Typical Characteristics

at TA = 25°C, VS = 5 V, VIN+ = 12 V, and alert pullup resistor = 10 kΩ (unless otherwise noted)

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Figure 6-1 Input Offset Voltage Distribution (INA301A1-Q1)
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Figure 6-3 Input Offset Voltage Distribution (INA301A3-Q1)
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Figure 6-5 Common-Mode Rejection Ratio Distribution (INA301A1-Q1)
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Figure 6-7 Common-Mode Rejection Ratio Distribution (INA301A3-Q1)
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Figure 6-9 Common-Mode Rejection Ratio vs. Frequency
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Figure 6-11 Gain Error Distribution (INA301A2-Q1)
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Figure 6-13 Gain Error vs. Temperature
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Figure 6-15 Power-Supply Rejection Ratio vs. Frequency
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VS = 5 V
Figure 6-17 Input Bias Current vs. Common-Mode Voltage
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Figure 6-19 Input Bias Current vs. Temperature
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Figure 6-21 Quiescent Current vs. Temperature
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Figure 6-23 0.1-Hz to 10-Hz Referred-to-Input Voltage Noise
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4-VPP output step
Figure 6-25 Voltage Output Falling Step Response
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Figure 6-27 Start-Up Response
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Figure 6-29 Total Propagation Delay (INA301A1-Q1)
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Figure 6-31 Total Propagation Delay (INA301A3-Q1)
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Figure 6-33 Comparator Alert VOL vs. IOL
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Figure 6-35 Comparator Reset Response
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Figure 6-2 Input Offset Voltage Distribution (INA301A2-Q1)
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Figure 6-4 Input Offset Voltage vs. Temperature
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Figure 6-6 Common-Mode Rejection Ratio Distribution (INA301A2-Q1)
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Figure 6-8 Common-Mode Rejection Ratio vs. Temperature
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Figure 6-10 Gain Error Distribution (INA301A1-Q1)
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Figure 6-12 Gain Error Distribution (INA301A3-Q1)
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Figure 6-14 Gain vs. Frequency
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Figure 6-16 Output Voltage Swing vs. Output Current
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VS = 0 V
Figure 6-18 Input Bias Current vs. Common-Mode Voltage
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Figure 6-20 Quiescent Current vs. Supply Voltage
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Figure 6-22 Input-Referred Voltage Noise vs. Frequency
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4-VPP output step
Figure 6-24 Voltage Output Rising Step Response
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Figure 6-26 Common-Mode Voltage Transient Response
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Figure 6-28 Limit Current Source vs. Temperature
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Figure 6-30 Total Propagation Delay (INA301A2-Q1)
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VOD = 1 mV
Figure 6-32 Comparator Propagation Delay vs. Temperature
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Figure 6-34 Hysteresis vs. Temperature