JAJSNR9B April   2016  – April 2022 INA301-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Alert Output ( ALERT Pin)
      2. 7.3.2 Current-Limit Threshold
        1. 7.3.2.1 Resistor-Controlled Current Limit
          1. 7.3.2.1.1 Resistor-Controlled, Current-Limit Example
        2. 7.3.2.2 Voltage-Source-Controlled Current Limit
      3. 7.3.3 Hysteresis
    4. 7.4 Device Functional Modes
      1. 7.4.1 Alert Mode
        1. 7.4.1.1 Transparent Output Mode
        2. 7.4.1.2 Latch Output Mode
  8. 8 Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Selecting a Current-Sensing Resistor
        1. 8.1.1.1 Selecting a Current-Sensing Resistor Example
      2. 8.1.2 Input Filtering
      3. 8.1.3 INA301-Q1 Operation With Common-Mode Voltage Transients Greater Than 36 V
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.3.3 Hysteresis

The onboard comparator in the INA301-Q1 reduces the possibility of oscillations in the alert output when the measured signal level is near the overlimit threshold level because of noise. When the output voltage (VOUT) exceeds the voltage developed at the LIMIT pin, the ALERT pin is asserted and pulls low. The output voltage must drop below the LIMIT pin threshold voltage by the gain-dependent hysteresis level for the ALERT pin to deassert and return to the nominal high state (see Figure 7-2).

GUID-EFD44F8E-B6C5-4663-8B44-F81A46533BA0-low.gifFigure 7-2 Typical Comparator Hysteresis