JAJSOA3B February   2023  – June 2024 TPS25948

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 7.3.2 Overvoltage Lockout (OVLO)
      3. 7.3.3 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 7.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.3.2 Active Current Limiting
        3. 7.3.3.3 Short-Circuit Protection
      4. 7.3.4 Analog Load Current Monitor
      5. 7.3.5 Reverse Current Protection
      6. 7.3.6 Overtemperature Protection (OTP)
      7. 7.3.7 Fault Response and Indication (FLT)
      8. 7.3.8 Supply Good Indication (SPLYGD/SPLYGD)
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
    3. 8.3 Typical Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
        1. 8.3.2.1 Setting Overvoltage Threshold
        2. 8.3.2.2 Setting Output Voltage Rise Time (tR)
        3. 8.3.2.3 Setting Overcurrent Threshold (ILIM)
        4. 8.3.2.4 Setting Overcurrent Blanking Interval (tITIMER)
      3. 8.3.3 Application Curves
    4. 8.4 Active ORing
    5. 8.5 Priority Power MUXing
    6. 8.6 Parallel Operation
    7. 8.7 USB PD Port Protection
    8. 8.8 Power Supply Recommendations
      1. 8.8.1 Transient Protection
      2. 8.8.2 Output Short-Circuit Measurements
    9. 8.9 Layout
      1. 8.9.1 Layout Guidelines
      2. 8.9.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

TPS25948 YWP Package, 12-Ball PWCSP (Top View)Figure 5-1 YWP Package, 12-Ball PWCSP (Top View)
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NAMENO.
EN/UVLO

1

Analog inputActive high enable for the device. A resistor divider on this pin from input supply to GND can be used to adjust the undervoltage lockout threshold. Do not leave floating. Refer to Section 7.3.1 for details.

OVLO

2

Analog inputA resistor divider on this pin from supply to GND can be used to adjust the overvoltage lockout threshold. This pin can also be used as an Aactive low enable for the device. Do not leave floating. Refer to Section 7.3.2 for details.

SPLYGD

3

Digital outputTPS259480x/2x: Active high Supply Good indication. This is an open drain signal which is asserted high when the input supply is valid and channel has completed inrush sequence. This can be used to enable/disable the auxiliary supply eFuse to facilitate smooth switchover in a priority power MUXing configuration. Refer to Section 7.3.8 for more details.

SPLYGD

Digital outputTPS259481x: Active low Supply Good indication. This is an open drain signal which is asserted Low when the input supply is valid and channel has completed inrush sequence. This can be used to enable/disable the auxiliary supply eFuse to facilitate smooth switchover in a priority power MUXing configuration. Refer to Section 7.3.8 for more details.

FLT

4

Digital outputTPS259480x: Active low fault event indicator. This is an open drain signal which will be pulled low when a fault is detected. Refer to Section 7.3.7 for more details.

RCBCTRL

Digital inputTPS259481x/2x: Active high reverse current blocking enable input. Leave the pin floating or pull it high to enable reverse current blocking at all times. Pull the pin low to disable reverse current blocking in steady-state to enable bi-directional current flow.

IN

5, 12

PowerPower input.

OUT

6, 11

PowerPower output.

DVDT

7

Analog outputA capacitor from this pin to GND sets the output turn on slew rate. Leave this pin floating for the fastest turn on slew rate. Refer to Section 7.3.3.1 for details.

GND

8

GroundThis is the ground reference for all internal circuits and must be connected to system GND.

ILM

9

Analog outputThis is a dual function pin used to limit and monitor the output current. An external resistor from this pin to GND sets the output current limit threshold during start-up as well as steady state. The pin voltage can also be used as analog output load current monitor signal. Do not leave floating. Refer to Section 7.3.3.2 for more details.

ITIMER

10

Analog outputA capacitor from this pin to GND sets the overcurrent blanking interval during which the output current can temporarily exceed set current limit (but lower than fast-trip threshold) before the device overcurrent response takes action. Leave this pin open for fastest response to overcurrent events. Refer to Section 7.3.3.2 for more details.