JAJSOR6 September   2024 LM706A0-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Voltage Range (VIN)
      2. 6.3.2  High-Voltage Bias Supply Regulator (VCC, BIAS, VDDA)
      3. 6.3.3  Enable (EN)
      4. 6.3.4  Power-Good Monitor (PG)
      5. 6.3.5  Switching Frequency (RT)
      6. 6.3.6  Dual Random Spread Spectrum (DRSS)
      7. 6.3.7  Soft Start
      8. 6.3.8  Output Voltage Setpoint (FB)
      9. 6.3.9  Minimum Controllable On-Time
      10. 6.3.10 Error Amplifier and PWM Comparator (FB, EXTCOMP)
      11. 6.3.11 Slope Compensation
      12. 6.3.12 Shunt Current Sensing
      13. 6.3.13 Hiccup Mode Current Limiting
      14. 6.3.14 Device Configuration (CONFIG)
      15. 6.3.15 Single-Output Dual-Phase Operation
      16. 6.3.16 Pulse Frequency Modulation (PFM) / Synchronization
      17. 6.3.17 Thermal Shutdown (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Standby Mode
      3. 6.4.3 Active Mode
      4. 6.4.4 Sleep Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Power Train Components
        1. 7.1.1.1 Buck Inductor
        2. 7.1.1.2 Output Capacitors
        3. 7.1.1.3 Input Capacitors
        4. 7.1.1.4 EMI Filter
      2. 7.1.2 Error Amplifier and Compensation
      3. 7.1.3 Maximum Ambient Temperature
        1. 7.1.3.1 Derating Curves
    2. 7.2 Typical Applications
      1. 7.2.1 Design 1 – High Efficiency, Wide Input, 400kHz Synchronous Buck Regulator
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2 Custom Design With Excel Quickstart Tool
          3. 7.2.1.2.3 Buck Inductor
          4. 7.2.1.2.4 Current-Sense Resistance
          5. 7.2.1.2.5 Output Capacitors
          6. 7.2.1.2.6 Input Capacitors
          7. 7.2.1.2.7 Frequency Set Resistor
          8. 7.2.1.2.8 Feedback Resistors
          9. 7.2.1.2.9 Compensation Components
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Design 2 – High Efficiency 24V to 3.3V 400kHz Synchronous Buck Regulator
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Design and Layout
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
        1. 8.2.1.1 PCB Layout Resources
        2. 8.2.1.2 Thermal Design Resources
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

6.3.2 High-Voltage Bias Supply Regulator (VCC, BIAS, VDDA)

The LM706A0-Q1 contains an internal high-voltage VCC bias regulator that provides the bias supply for the gate drivers for the power MOSFETs. The input voltage pin (VIN) can be connected directly to an input voltage source up to 65V. However, when the input voltage is below the VCC setpoint level, the VCC voltage tracks VIN minus a small voltage drop.

If configured for a 3.3V fixed output, the VCC bias regulator output voltage is 5V to allow connecting the BIAS pin to an external supply from 5V to 30V. Similarly, if configured for a 5V fixed output, the VCC bias regulator output voltage is 5V to allow connecting the BIAS pin to the VOUT node or an external supply from 5V to 30V. For a 12V fixed output or an adjustable output, the VCC bias regulator output voltage is 8V to allow connecting the BIAS pin to the VOUT node or an external supply from 10V to 30V.

At power up, the VCC regulator sources current into the capacitor connected to the VCC pin (if EN pin is connected to a voltage greater than 2V). When the VCC voltage exceeds 4.3V, the output is enabled and the soft-start sequence begins. The output remains active unless the VCC voltage falls below the VCC falling UVLO threshold of 4V (typical) or the EN is driven below 900mV (typical). TI recommends that a 4.7µF capacitor is connected from the VCC pin to PGND and placed as close as possible to the device pins.

Internal power dissipation of the VCC regulator can be minimized by connecting the BIAS pin to VOUT or an external supply. If the BIAS voltage is above 9.1V (typical), the input to the VCC regulator switches over from VIN to BIAS. If configured for a 3.3V fixed or a 5V fixed output, the switchover happens at 4.6V (typical). Tie the BIAS pin to AGND if unused. Never connect the BIAS pin to a voltage greater than 32V. If an external supply is connected to the BIAS pin to power the LM706A0-Q1, VIN must be greater than the external bias voltage under all conditions to avoid damage to the device.

An internal 5V linear regulator generates the VDDA bias supply from the VCC bias supply. Bypass VDDA with a 100nF ceramic capacitor to achieve a low-noise internal bias rail. Normally VDDA is 5V, however when configured for a fixed 3.3V or a fixed 5V VOUT, the VDDA regulator is disabled in sleep mode while the circuitry, normally powered by the VDDA, is switched over to VOUT as the power source.