Figure 7-8 shows an example of the general call I
2C write command supported by the
TMAG5173-Q1. This command is useful to configure multiple I
2C devices
in a I
2C bus simultaneously. The starting byte contains 8-bit '0's. The MSB of the
second byte contains the conversion trigger bit. Writing '1' at this trigger bit will start a
new conversion after the register address decoding is completed. The 7 LSB bits of the second
byte contains the starting register address for the write command. After the two command
bytes, the primary device starts to send the data to be written at the corresponding register
address of all the secondary devices in the I
2C bus. Each successive write byte
will send the data for the successive register address in the secondary devices.