JAJSP62G December   2002  – September 2022 SN65HVD20 , SN65HVD21 , SN65HVD22 , SN65HVD23 , SN65HVD24

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Driver Electrical Characteristics
    6. 8.6  Receiver Electrical Characteristics
    7. 8.7  Driver Switching Characteristics
    8. 8.8  Receiver Switching Characteristics
    9. 8.9  Receiver Equalization Characteristics
    10. 8.10 Power Dissipation
    11. 8.11 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
    4. 10.4 Device Functional Modes
      1. 10.4.1 Test Mode Driver Disable
      2. 10.4.2 Equivalent Input and Output Schematic Diagrams
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Noise Considerations for Equalized Receivers
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 サポート・リソース
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

9 Parameter Measurement Information

Note:

Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle, ZO = 50 Ω (unless otherwise specified).

GUID-64109518-B591-4816-B5B3-3870562068CE-low.gifFigure 9-1 Driver Test Circuit, VOD and VOC Without Common-Mode Loading
GUID-5BCFA3F7-3486-4AC5-B064-C3394414E48D-low.gifFigure 9-2 Driver Test Circuit, VOD With Common-Mode Loading
GUID-0B5476B8-A4B2-4150-9D6F-498D638F4D9C-low.gifFigure 9-3 Driver Switching Test Circuit and Waveforms
GUID-FC5ECD1F-404E-4143-BE27-9310CB4D95ED-low.gifFigure 9-4 Driver VOC Test Circuit and Waveforms
GUID-EEBBE86A-CF46-41B7-8B79-70777BFE57AE-low.gif
VOD(RING) is measured at four points on the output waveform, corresponding to overshoot and undershoot from the VOD(H) and VOD(L) steady state values.
Figure 9-5 VOD(RING) Waveform and Definitions
GUID-7948290B-7BAE-47FD-949D-570A9C8F9ED5-low.gifFigure 9-6 Driver Enable and Disable Test, High Output
GUID-881B1EF7-BD31-4CDF-917C-049B0B4FB28C-low.gifFigure 9-7 Driver Enable and Disable Test, Low Output
GUID-11F25B06-614D-417B-8D10-9FF56537761D-low.gifFigure 9-8 Driver Standby and Wake Test Circuit and Waveforms
GUID-B7F2164A-A319-4579-A010-A79C2B3F4B79-low.gifFigure 9-9 Driver Short-Circuit Test
GUID-1982EE2A-1690-46C0-A0A2-D669EB2B3003-low.gifFigure 9-10 Receiver DC Parameter Definitions
GUID-A7B87C77-2E42-4AF9-8532-D75A76F7327C-low.gifFigure 9-11 Receiver Switching Test Circuit and Waveforms
GUID-C443233C-22C1-476D-B6C6-B5085CFD098F-low.gifFigure 9-12 Receiver Enable Test Circuit and Waveforms, Data Output High
GUID-2D4EDFC6-99D8-48D6-8ADC-7570792EFA5F-low.gifFigure 9-13 Receiver Enable Test Circuit and Waveforms, Data Output Low
GUID-00EFA442-40C5-4F32-B84C-3A7EA588AE2E-low.gifFigure 9-14 Receiver Standby and Wake Test Circuit and Waveforms
GUID-3FA21122-9EC2-4489-8590-A60788695BC2-low.gifFigure 9-15 Receiver Active Failsafe Definitions and Waveforms
GUID-C74E2FEB-6706-49AE-9F3C-D82FE78673B9-low.gifFigure 9-16 Test Circuit and Waveforms, Transient Overvoltage Test