JAJSPM3D July   2010  – January 2023 TCA6424A

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Description (continued)
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings (1)
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Reset Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Voltage Translation
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 I2C Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Address
    5. 8.5 Programming
      1. 8.5.1 Power-On Reset
      2. 8.5.2 Reset Input ( RESET)
      3. 8.5.3 Interrupt Output ( INT)
      4. 8.5.4 Bus Transactions
        1. 8.5.4.1 Writes
        2. 8.5.4.2 Reads
    6. 8.6 Register Maps
      1. 8.6.1 Control Register and Command Byte
      2. 8.6.2 Register Descriptions
  9. 9 Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Detailed Design Procedure
        1. 9.1.1.1 Minimizing ICC When I/Os Control LEDs
    2. 9.2 Power Supply Recommendation
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 商標
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
      1.      Mechanical, Packaging, and Orderable Information

8.4.1 Device Address

The address of the TCA6424A is shown in #SCPS133IMG2619.

Figure 8-6 TCA6424A Address
Table 8-3 Address Reference
ADDRI2C BUS TARGET ADDRESS
L34 (decimal), 22 (hexadecimal)
H35 (decimal), 23 (hexadecimal)

The last bit of the target address defines the operation (read or write) to be performed. A high (1) selects a read operation, while a low (0) selects a write operation.