JAJSQ51N October   1995  – August 2024 SN54AHCT374 , SN74AHCT374

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Noise Characteristics
    9. 5.9 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Power Supply Recommendations
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
        1. 8.2.1.1 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN54AHCT374 SN74AHCT374 J, DB, DW, N, NS, or PW Package20-Pin CDIP, SSOP, SOIC, PDIP, SO, or TSSOP(Top View)J, DB, DW, N, NS, or PW Package
20-Pin CDIP, SSOP, SOIC, PDIP, SO, or TSSOP
(Top View)
SN54AHCT374 SN74AHCT374 FK Package20-Pin LCCC(Top View)FK Package
20-Pin LCCC
(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
OE 1 I Enable pin
1Q 2 O Output 1
1D 3 I Input 1
2D 4 I Input 2
2Q 5 O Output 2
3Q 6 O Output 3
3D 7 I Input 3
4D 8 I Input 4
4Q 9 O Output 4
GND 10 – Ground pin
CLK 11 I Clock pin
5Q 12 O Output 5
5D 13 I Input 5
6D 14 I Input 6
6Q 15 O Output 6
7Q 16 O Output 7
7D 17 I Input 7
8D 18 I Input 8
8Q 19 O Output 8
VCC 20 – Power pin