JAJSQB5H June   1998  – July 2024 SN74AHCT174

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Noise Characteristics
    9. 5.9 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Power Supply Recommendations
    2. 8.2 Layout
      1. 8.2.1 Layout Guidelines
      2. 8.2.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support (Analog)
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN74AHCT174 Package SN74AHCT174 D, DB, DGV, N, NS, or PW Package (Top View) Figure 4-1 Package SN74AHCT174 D, DB, DGV, N, NS, or PW Package (Top View)
Table 4-1 Pin Functions
PIN I/O(1) DESCRIPTION
NO. NAME
1 CLR I Clear all channels, active low
2 1Q O Channel 1, Q output
3 1D I Channel 1, D input
4 2D I Channel 2, D input
5 2Q O Channel 2, Q output
6 3D I Channel 3, D input
7 3Q O Channel 3, Q output
8 GND — Ground
9 CLK I Clock all channels, rising edge triggered
10 4Q O Channel 4, Q output
11 4D I Channel 4, D input
12 5Q O Channel 5, Q output
13 5D I Channel 5, D input
14 6D I Channel 6, D input
15 6Q O Channel 6, Q output
16 VCC — Positive supply