The modulator generates a bitstream that is processed by a digital filter to obtain a digital word similar to a conversion result of a conventional analog-to-digital converter (ADC). Equation 2 shows a sinc³-type filter, which is a very simple filter built with minimal effort and hardware.

Equation 2.

This filter provides the best output performance at the lowest hardware size (count of digital gates) for a second-order modulator. All characterization in this document is done with a sinc³ filter with an oversampling ratio (OSR) of 256 and a 16-bit output word width.

The Combining the ADS1202 with an FPGA Digital Filter for Current Measurement in Motor Control Applications application note discusses an example code. Use this example code for implementing a sinc³ filter in an FPGA. This application note is available for download at www.ti.com.

For modulator output bitstream filtering, use a device from TI's C2000 or Sitara microcontroller families. These families support multichannel dedicated hardwired filter structures that significantly simplify system level design by offering two filtering paths per channel. One path provides high-accuracy results for the control loop and the other provides a fast-response path for overcurrent detection.

A delta sigma modulator filter calculator is available for download at www.ti.com that aids in filter design and correct OSR and filter order selection. This calculator helps achieve the desired output resolution and filter response time.