I²C is a 2-wire serial interface developed by Philips Semiconductor, now NXP Semiconductors. The bus consists of a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines are pulled high. All the I²C-compatible devices connect to the I²C bus through open drain I/O pins, SDA and SCL. A controller device, usually a microcontroller or a digital signal processor, controls the bus. The controller is responsible for generating the SCL signal and device addresses. The controller also generates specific conditions that indicate the START and STOP of data transfer. A target device receives or transmits data on the bus under control of the controller device, or both.

The device works as a target and supports the following data transfer modes, as defined in the I²C-Bus Specification: standard mode (100kbps) and fast mode (400kbps), fast mode plus (1Mbps), and high-speed mode (3.4Mbps). The interface adds flexibility to the power supply design, enabling most functions to be programmed to new values depending on the instantaneous application requirements. Register contents remain intact as long as the input voltage remains above 1.8V.

The data transfer protocol for standard and fast modes is exactly the same, therefore, the modes are referred to as F/S mode in this document. The protocol for high speed mode is different from F/S mode, and the mode referred to as HS mode.

TI recommends that the I²C controller initiates a STOP condition on the I²C bus after the initial power up of SDA and SCL pullup voltages to make sure of a reset of the I²C engine.