JAJSS10K December   2003  – November 2023 SN74AVC8T245

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 1.2 V
    7. 5.7  Switching Characteristics, VCCA = 1.5 V ± 0.1 V
    8. 5.8  Switching Characteristics, VCCA = 1.8 V ± 0.15 V
    9. 5.9  Switching Characteristics, VCCA = 2.5 V ± 0.2 V
    10. 5.10 Switching Characteristics, VCCA = 3.3 V ± 0.3 V
    11. 5.11 Operating Characteristics
    12. 5.12 Typical Total Static Power Consumption (ICCA + ICCB)
    13. 5.13 Typical Characteristics
  7.   Parameter Measurement Information
  8. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Fully Configurable Dual-Rail Design
      2. 6.3.2 Support High-Speed Translation
      3. 6.3.3 Ioff Supports Partial-Power-Down Mode Operation
      4. 6.3.4 Balanced High-Drive CMOS Push-Pull Outputs
      5. 6.3.5 Vcc Isolation
    4. 6.4 Device Functional Modes
  9. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  11. Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

GUID-0C8D259C-7DA3-459C-BFA4-3407AC8C6B49-low.gifFigure 4-1 DGV or PW Package, 24-Pin TVSOP or TSSOP (Top View)
GUID-8B7A7624-7D30-4649-A984-1089BCA91F87-low.gifFigure 4-2 RHL Package, 24-Pin VQFN (Top View)
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
A1 3 I/O Input/output A1. Referenced to VCCA.
A2 4 I/O Input/output A2. Referenced to VCCA.
A3 5 I/O Input/output A3. Referenced to VCCA.
A4 6 I/O Input/output A4. Referenced to VCCA.
A5 7 I/O Input/output A5. Referenced to VCCA.
A6 8 I/O Input/output A6. Referenced to VCCA.
A7 9 I/O Input/output A7. Referenced to VCCA.
A8 10 I/O Input/output A8. Referenced to VCCA.
B1 21 I/O Input/output B1. Referenced to VCCB.
B2 20 I/O Input/output B2. Referenced to VCCB.
B3 19 I/O Input/output B3. Referenced to VCCB.
B4 18 I/O Input/output B4. Referenced to VCCB.
B5 17 I/O Input/output B5. Referenced to VCCB.
B6 16 I/O Input/output B6. Referenced to VCCB.
B7 15 I/O Input/output B7. Referenced to VCCB.
B8 14 I/O Input/output B8. Referenced to VCCB.
DIR 2 I Direction-control signal
GND 11, 12, 13 Ground
OE 22 I 3-state output-mode enables. Pull OE high to place all outputs in 3-state mode. Referenced to VCCA.
VCCA 1 A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V
VCCB 23, 24 B-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V