JAJSS10K
December 2003 – November 2023
SN74AVC8T245
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics, VCCA = 1.2 V
5.7
Switching Characteristics, VCCA = 1.5 V ± 0.1 V
5.8
Switching Characteristics, VCCA = 1.8 V ± 0.15 V
5.9
Switching Characteristics, VCCA = 2.5 V ± 0.2 V
5.10
Switching Characteristics, VCCA = 3.3 V ± 0.3 V
5.11
Operating Characteristics
5.12
Typical Total Static Power Consumption (ICCA + ICCB)
5.13
Typical Characteristics
Parameter Measurement Information
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Fully Configurable Dual-Rail Design
6.3.2
Support High-Speed Translation
6.3.3
Ioff Supports Partial-Power-Down Mode Operation
6.3.4
Balanced High-Drive CMOS Push-Pull Outputs
6.3.5
Vcc Isolation
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
ドキュメントの更新通知を受け取る方法
8.3
サポート・リソース
8.4
Trademarks
8.5
静電気放電に関する注意事項
8.6
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
7.4.2
Layout Example
Figure 7-3
SN74AVC8T245
Layout Example