JAJSSQ9A June   2024  – November 2024 TPSM82866C

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Optimized Transient Performance from PWM to PSM Operation
      4. 7.3.4 Low Dropout Operation (100% Duty Cycle)
      5. 7.3.5 Enable and Soft-Start Ramp
      6. 7.3.6 Switch Current Limit and HICCUP Short-Circuit Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Thermal Warning and Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Output Discharge
      3. 7.4.3 Start-Up Output Voltage and I2C Target Address Selection (VSET)
      4. 7.4.4 Select Output Voltage Registers (VID)
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-Mode, Fast-Mode, and Fast-Mode Plus Protocol
      3. 7.5.3 HS-Mode Protocol
      4. 7.5.4 I2C Update Sequence
      5. 7.5.5 I2C Register Reset
  9. 8 Register Map
    1. 8.1 Target Address Byte
    2. 8.2 Register Address Byte
    3. 8.3 VOUT Register 1
    4. 8.4 VOUT Register 2
    5. 8.5 CONTROL Register
    6. 8.6 STATUS Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input and Output Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.4.3 Start-Up Output Voltage and I2C Target Address Selection (VSET)

During the enable delay (tDelay), the start-up output voltage and device I2C target address are set by an external resistor connected to the VSET/VID pin through an internal R2D (resistor to digital) converter. The device VOUT Register 1 is also set according to the start-up voltage. Table 7-1 shows the allowed resistor values. The allowed resistor tolerance is shown in Section 6.3.

Table 7-1 Start-up Output Voltage and I2C Target Address Options
RESISTOR (E96 SERIES, ±1% ACCURACY) AT VSET/VID

TPSM8286xCA2

START-UP OUTPUT VOLTAGE

TPSM8286xCA3

START-UP OUTPUT VOLTAGE		 I2C TARGET ADDRESS
249kΩ 1.15V

2.30V

 1000 110 (0x46)
205kΩ 1.10V

2.20V

 1000 101 (0x45)
162kΩ 1.05V

2.10V

 1000 100 (0x44)
133kΩ 1.00V

2.00V

 1000 011 (0x43)
105kΩ 0.95V

1.90V

 1000 010 (0x42)
86.6kΩ 0.90V

1.80V

 1000 001 (0x41)
68.1kΩ 0.85V

1.70V

 1001 000 (0x48)
56.2kΩ 0.80V

1.60V

 1001 001 (0x49)
44.2kΩ 0.75V

1.50V

 1001 010 (0x4A)
36.5kΩ 0.70V

1.40V

 1001 011 (0x4B)
28.7kΩ 0.65V

1.30V

 1001 100 (0x4C)
23.7kΩ 0.60V

1.20V

 1001 101 (0x4D)
18.7kΩ 0.55V

1.10V

 1001 110 (0x4E)
15.4kΩ 0.50V

1.00V

 1001 111 (0x4F)
12.1kΩ 0.45V

0.90V

 1000 000 (0x40)
10kΩ or lower 0.40V

0.80V

 1000 111 (0x47)

The R2D converter has an internal current source, which applies current through the external resistor, and an internal ADC, which reads back the resulting voltage level. Depending on the level, the correct start-up output voltage and I2C target address are set. After this R2D conversion is finished, the current source is turned off to avoid current flowing through the external resistor. Make sure that there is no additional current path or capacitance greater than 30pF from this pin to GND during R2D conversion. Otherwise, a false value is set.

During the ramp-up period (tRamp), the output voltage ramps to the target value set by VSET first, then ramps up or down to the new value when the value of the output register is changed by I2C interface commands.