JAJSSS6B January   2024  – June 2024 TPS7H3014-SP

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Quality Conformance Inspection
    8. 6.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (IN), VLDO and REFCAP
        1. 8.3.1.1 Undervoltage Lockout (VPOR_IN < VIN < UVLO)
        2. 8.3.1.2 Power-On Reset (VIN < VPOR_IN )
      2. 8.3.2 SENSEx Inputs
        1. 8.3.2.1 VTH_SENSEX and VONx
        2. 8.3.2.2 IHYS_SENSEx and VOFFx
        3. 8.3.2.3 Top and Bottom Resistive Divider Design Equations
      3. 8.3.3 Output Stages (ENx,SEQ_DONE,PWRGD,PULL_UP1 and PULL_UP2)
      4. 8.3.4 User-Programmable TIMERS
        1. 8.3.4.1 DLY_TMR
        2. 8.3.4.2 REG_TMR
      5. 8.3.5 UP and DOWN
      6. 8.3.6 FAULT
      7. 8.3.7 State Machine
    4. 8.4 Daisy Chain
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Self Contained – Sequence UP and DOWN
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Input Power Supplies and Decoupling Capacitors
          2. 9.2.1.2.2 UP and DOWN Thresholds
          3. 9.2.1.2.3 SENSEx Thresholds
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Sequencing of Negative Voltage Rails
        1. 9.2.2.1 Negative Voltage Design Equations
    3. 9.3 Externally Induced System RESET
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Negative Voltage Design Equations

For the purpose of this discussion the following assumptions are made:

  1. V+ is provide from 2.5V stable reference voltage.
  2. The output stage of the comparator is push-pull.
  3. The negative voltage to be sequenced is –1.8V at steady-state.

The first step in the design is to select the voltages (or percent of the steady-state voltage) at which the negative rail is considered to be:

  • In regulation
    • The –1.8V rail is considered to be in regulation when it is > to 97% of the final value. In this case 1.746V. We refer to this as the on voltage (VON)
  • Not in regulation.
    • The –1.8V rail is considered not be in regulation when it is < to 95% of the final value. In this case 1.71V. We refer to this as the off voltage (VOFF)

With this information we can calculate the hysteresis voltage as:

Equation 36. V h y s ( V ) = V O N   ( V )   V O F F   ( V )   =   1.746 V     1.71 V   =   0.036 V

The second step is determine the Rx, Ry and Rh resistors values used to generate the hysteresis reference voltages. These voltages are called VL and VH. We select VL to be an attenuated value from the 2.5V reference. In this example we select VL as 0.6V. VH is calculated as:

Equation 37. V H ( V ) = V L   ( V ) +   V h y s   ( V )   =   0.6 V   +   0.036 V   =   0 . 6 36 V

With this information we can calculate the resistor ratio as:

Equation 38. R h R x = V L ( V ) V h y s   ( V )     = 0.6 0.036   =   16.67
Equation 39. R y R x = V L ( V ) V +   ( V )   V H ( V )     = 0.6 2.5   0.636   =   0.32

The Rx value selected is 10kΩ and Ry and Rh are calculated using Equation 38 and Equation 39. Using 0.1% tolerance resistors the selected values are:

  • Ry = 3.2kΩ
  • Rh = 165kΩ

As the actual resistors are known, we can calculate the actual VL and VH to be:

  • VH_REAL = 0.633V
  • VL_REAL = 0.597V

Finally we want to calculate the resistors for RTOP and RBOTTOM per Figure 9-14. For this we can calculate an equivalent voltage at the inverting input when the –VOUTx must be considered to be on regulation as:

Equation 40. V O U T _ E Q ( V ) = V O F F S E T   ( V )   V O N   ( V )   =   2.5 V     1.7 46 V   =   0.754 V

Using this equivalent voltage and VL_REAL we can calculate the ratio of the bottom to top resistor as:

Equation 41. R B O T T O M R T O P = V L _ R E A L ( V ) V O U T _ E Q ( V )   V L _ R E A L ( V )     = 0.597 0.754   0.597   =   3.8

Using 0.1 % tolerance resistors and fixing RTOP to 10kΩ, RBOTTOM is selected as 38.2kΩ.

Now that all the final components are selected, we can calculate the real (or expected) on and off voltages as VON = 1.746V and VOFF = 1.701V