JAJSSS6B January   2024  – June 2024 TPS7H3014-SP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Quality Conformance Inspection
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (IN), VLDO and REFCAP
        1. 8.3.1.1 Undervoltage Lockout (VPOR_IN < VIN < UVLO)
        2. 8.3.1.2 Power-On Reset (VIN < VPOR_IN )
      2. 8.3.2 SENSEx Inputs
        1. 8.3.2.1 VTH_SENSEX and VONx
        2. 8.3.2.2 IHYS_SENSEx and VOFFx
        3. 8.3.2.3 Top and Bottom Resistive Divider Design Equations
      3. 8.3.3 Output Stages (ENx,SEQ_DONE,PWRGD,PULL_UP1 and PULL_UP2)
      4. 8.3.4 User-Programmable TIMERS
        1. 8.3.4.1 DLY_TMR
        2. 8.3.4.2 REG_TMR
      5. 8.3.5 UP and DOWN
      6. 8.3.6 FAULT
      7. 8.3.7 State Machine
    4. 8.4 Daisy Chain
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Self Contained – Sequence UP and DOWN
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Input Power Supplies and Decoupling Capacitors
          2. 9.2.1.2.2 UP and DOWN Thresholds
          3. 9.2.1.2.3 SENSEx Thresholds
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Sequencing of Negative Voltage Rails
        1. 9.2.2.1 Negative Voltage Design Equations
    3. 9.3 Externally Induced System RESET
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

TPS7H3014-SP HFT Package, 22-Pin CFP (Top View) Figure 5-1 HFT Package, 22-Pin CFP (Top View)
Table 5-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
SENSE1 1 I Non-inverting input of the comparator used to monitor the first rail to be sequenced up/down. To set the VON and VOFF voltages, connect an external resistive divider between the rail to be monitored and GND with the middle point tied to SENSE1. A voltage greater than 599mV (typ) on this pin is considered as a regulated voltage rail (VON). The VOFF is set by the IHYS current and the top resistor from the resistive divider. Refer to Top and Bottom Resistive Divider Design Equations.
SENSE2 2 I Non-inverting input of the comparator used to monitor the second rail to be sequenced up/down. To set the VON and VOFF voltages, connect an external resistive divider between the rail to be monitored and GND with the middle point tied to SENSE2. A voltage greater than 599mV (typ) on this pin is considered as a regulated voltage rail (VON). The VOFF is set by the IHYS current and the top resistor from the resistive divider. Refer to Top and Bottom Resistive Divider Design Equations.
SENSE3 3 I Non-inverting input of the comparator used to monitor the third rail to be sequenced up/down. To set the VON and VOFF voltages, connect an external resistive divider between the rail to be monitored and GND with the middle point tied to SENSE3. A voltage greater than 599mV (typ) on this pin is considered as a regulated voltage rail (VON). The VOFF is set by the IHYS current and the top resistor from the resistive divider. Refer to Top and Bottom Resistive Divider Design Equations.
SENSE4 4 I Non-inverting input of the comparator used to monitor the fourth rail to be sequenced up/down. To set the VON and VOFF voltages, connect an external resistive divider between the rail to be monitored and GND with the middle point tied to SENSE4. A voltage greater than 599mV (typ) on this pin is considered as a regulated voltage rail (VON). The VOFF is set by the IHYS current and the top resistor from the resistive divider. Refer to Top and Bottom Resistive Divider Design Equations.
REFCAP 5 O

1.2V internal reference. Requires a 470nF external capacitor to GND. Do not load this pin.

HYS 6 O Hysteresis. Connect a 50kΩ resistor between this pin and GND, to program the hysteresis current (typically 24μA) at SENSE1 to SENSE4. Is recommended using a resistor with a 0.1% or better tolerance for hysteresis current accuracy.
FAULT 7 O FAULT. Open drain output which is forced low by the state machine to indicate an internally generated fault. Is recommended to pull-up this pin to VLDO with a 10kΩ resistor. However, a different external voltage source can be used as the pull-up as long as it is stable before commanding the sequence up and never drops below 1V during the operation of the device.
UP 8 I Non-inverting input of a comparator. A rising voltage greater than 599mV (typ) will induce a rising edge and will start a sequence up. This pin can be driven by an external controller, or connected to a main rail trough an external resistive divider with the middle point connected to the UP pin to start the sequence up automatically. This threshold has a fixed hysteresis of 100mV (typ).
IN 9 I

Input supply to the device. Input voltage range is from 3V to 14V. Connect at least a 0.1μF ceramic capacitor as close as possible to the pin.
REG_TMR 10 I/O Time to regulation timer. Connect a resistor to GND between 10.5kΩ and 1.18MΩ to set the allowed time for a SENSEx rail to reach the regulation threshold (VON). The delay can be adjusted from 0.25ms to 25ms. Leave this pin floating to deactivate this feature.
DLY_TMR 11 I/O Delay timer. Connect a resistor to GND between 10.5kΩ and 1.18MΩ to set the sequence up and down delay. The delay can be adjusted from 0.25ms to 25ms. Leave this pin floating for no delay.
SEQ_DONE 12 O Sequence done. Push-pull output with VOH level set by PULL_UP2 input supply voltage. Indicates when the sequence up or down is completed.
PWRGD 13 O Power Good. Push-pull output with VOH level set by PULL_UP2 input supply voltage. Indicates when all rails (SENSE1 to SENSE4 ) are in regulation (greater than VONx).
GND 14 — Ground.
VLDO 15 O

Output of internal regulator. Requires at least 1μF external ceramic capacitor to GND. Allowed loading of this regulator are: FAULT pull-up using a 10kΩ resistor or to turn-off unused channels by connecting directly to SENSE2 to SENSE4 as needed.
DOWN 16 I Non-inverting input of a comparator. A falling voltage lower than 498mV (typ) will induce a falling edge and will start a sequence down. This pin can be driven by an external controller, or connected to a main rail through an external resistive divider with the middle point connected to the DOWN pin to start the sequence down automatically. This threshold has a fixed hysteresis of 100mV (typ).
PULL_UP2 17 I Input supply voltage to program the pull-up voltage for the push-pull output stage on SEQ_DONE and PWRGD. Connect at least a 1μF ceramic capacitor as close as possible to the pin.
PULL_UP1 18 I Input supply voltage to program the global pull-up voltage for the push-pull output stages on EN1 to EN4. Connect at least a 1μF ceramic capacitor as close as possible to the pin.
EN4 19 O Enable 4. Push pull output with VOH level set by the PULL_UP1 input supply voltage. Connect to the logic enable signal of the device to control and to be monitored by SENSE4.
EN3 20 O Enable 3. Push pull output with VOH level set by the PULL_UP1 input supply voltage. Connect to the logic enable signal of the device to control and to be monitored by SENSE3.
EN2 21 O Enable 2. Push pull output with VOH level set by the PULL_UP1 input supply voltage. Connect to the logic enable signal of the device to control and to be monitored by SENSE2.
EN1 22 O Enable 1. Push pull output with VOH level set by the PULL_UP1 input supply voltage. Connect to the logic enable signal of the device to control and to be monitored by SENSE1.
Thermal pad — Internally grounded. It is recommended to connect this metal thermal pad to a large ground plane for effective heat dissipation.
Metal lid Lid — The lid is internally connected to the thermal pad and GND through the seal ring.
(1) I = Input, O = Output, I/O = Input or Output, — = Other