JAJSSZ8T January   2015  – September 2024 SN74LVC125A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Operating Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Typical Application
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
      3. 8.1.3 Application Curves
    2. 8.2 Power Supply Recommendations
    3. 8.3 Layout
      1. 8.3.1 Layout Guidelines
      2. 8.3.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN74LVC125A D, DB, NS, or PW Package (Top View) Figure 4-1 D, DB, NS, or PW Package (Top View)
SN74LVC125A BQA or RGY Package (Top View) Figure 4-2 BQA or RGY Package (Top View)
Table 4-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
1OE 1 Input Output Enable
1A 2 Input Input A
1Y 3 Output Output Y
2OE 4 Input Output Enable
2A 5 Input Input A
2Y 6 Output Output Y
GND 7 — Ground
3Y 8 Output Output Y
3A 9 Input Input A
3OE 10 Input Output Enable
4Y 11 Output Output Y
4A 12 Input Input A
4OE 13 Input Output Enable
VCC 14 — Positive Supply
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power