JAJSTM8 April 2024 AFE20408
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ALARM_LATCH_CLR | DAC_TRIG | ADC_TRIG | ||||
R-0h | W-0h | W-0h | W-0h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
2 | ALARM_LATCH_CLR | W | 0h | Manually clear registers which are latching the alarm
condition. If an alarm condition is still present, the corresponding alarm latches
and alarm state are set again. This bit self-clears 0 = No action. 1 = Clear alarm bits. |
1 | DAC_TRIG | W | 0h | Software LDAC trigger. This bit self-clears. 0 = No action. 1 = Initiate data transfer from DAC buffer registers to active registers. |
0 | ADC_TRIG | W | 0h | ADC conversion trigger. Set this bit to 1 to start the
ADC conversions. In direct-mode, this bit self-clears back to 0 after all
conversions are completed. In auto-mode, this bit remains set and the ADC
continuously converts until the user manually clears the bit back to 0, stopping
auto-mode. Before setting ADC_TRIG to 1, confirm the ADC is ready by reading the
ADC_READY status bit as 0 twice in succession. 0 = Stop ADC conversions. 1 = Start ADC conversions |