JAJSTN7N December   1995  – July 2024 SN54AHC540 , SN74AHC540

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    7. 5.7  Switching Characteristics, VCC = 5 V ± 0.5 V
    8. 5.8  Noise Characteristics
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Layout Guidelines
    4. 8.4 Layout
      1. 8.4.1 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

10 Revision History

Changes from Revision M (May 2016) to Revision N (July 2024)

  • ドキュメント全体にわたって表、図、相互参照の採番方法を更新Go
  • Updated RθJA values: PW = 105.4 to 116.8, DW = 83.0 to 81.1; Updated PW and DW packages for RθJC(top), RθJB, ΨJT, ΨJB, and RθJC(bot), all values in °C/W Go

Changes from Revision L (October 2015) to Revision M (May 2016)

  • 先頭ページの概略回路図を更新Go
  • Updated Pin Out drawing diagrams to new standard Go
  • Updated Functional Block Diagram Go
  • Updated Outputs in Function Table of Device Functional Modes section Go