JAJSUH1
April 2024
TAS2505A-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
I2S/LJF/RJF Timing in Master Mode
5.7
I2S/LJF/RJF Timing in Slave Mode
5.8
DSP Timing in Master Mode
5.9
DSP Timing in Slave Mode
5.10
I2C Interface Timing
5.11
SPI Interface Timing
5.12
Typical Characteristics
5.12.1
Class D Speaker Driver Performance
5.12.2
HP Driver Performance
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Audio Analog I/O
7.3.2
Audio DAC and Audio Analog Outputs
7.3.3
DAC
7.3.4
POR
7.3.5
CLOCK Generation and PLL
7.3.6
Speaker Driver
7.3.7
Automotive Diagnostics
7.4
Device Functional Modes
7.4.1
Digital Pins
7.4.2
Analog Pins
7.4.3
Multifunction Pins
7.4.4
Analog Signals
7.4.4.1
Analog Inputs AINL and AINR
7.4.5
DAC Processing Blocks — Overview
7.4.6
Digital Mixing and Routing
7.4.7
Analog Audio Routing
7.4.8
5V LDO
7.4.9
Digital Audio and Control Interface
7.4.9.1
Digital Audio Interface
7.4.9.2
Control Interface
7.4.9.2.1
I2C Control Mode
7.4.9.2.2
SPI Digital Interface
7.4.9.3
Device Special Functions
7.5
Register Map
8
Register Map
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Typical Configuration
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
Circuit Configuration With Internal LDO
9.2.2.1
Design Requirements
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
9.4.3
Thermal Pad
10
Device and Documentation Support
10.1
サード・パーティ製品に関する免責事項
10.2
Documentation Support
10.2.1
Related Documentation
10.3
ドキュメントの更新通知を受け取る方法
10.4
サポート・リソース
10.5
Trademarks
10.6
静電気放電に関する注意事項
10.7
用語集
10.8
Community Resources
11
Revision History
12
Mechanical, Packaging, and Orderable Information
7.4.9
Digital Audio and Control Interface