JAJSUH5F July   2005  – August 2024 LMH6702QML-SP

PRODUCTION DATA  

  1.   1
  2. 1特長
  3. 2アプリケーション
  4. 3概要
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Quality Conformance Inspection
    4. 5.4 Electrical Characteristics: DC Parameters
    5. 5.5 Electrical Characteristics: AC Parameters
    6. 5.6 Electrical Characteristics: Drift Values Parameters
    7. 5.7 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Feedback Resistor
      2. 6.1.2 Harmonic Distortion
      3. 6.1.3 Capacitive Load Drive
      4. 6.1.4 DC Accuracy and Noise
    2. 6.2 Layout
      1. 6.2.1 Layout Guidelines
  8. 7Device and Documentation Support
    1. 7.1 ドキュメントの更新通知を受け取る方法
    2. 7.2 サポート・リソース
    3. 7.3 Trademarks
    4. 7.4 静電気放電に関する注意事項
    5. 7.5 用語集
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

5.6 Electrical Characteristics: Drift Values Parameters

The following conditions apply (unless otherwise specified)(1):
RL = 100Ω, VCC = ±5VDC, AV = +2 feedback resistor (RF) = 250Ω, gain resistor (RG) = 250Ω
Delta not required on B level product. Delta required for S-level product at Group B5 only, or as specified on the internal processing instruction (IPI).
PARAMETER TEST CONDITIONS PACKAGE MIN MAX UNIT SUB- GROUPS
IBN Input bias current noninverting NAB –0.3 0.3 μA 1
NAC –0.75 0.75
IBI Input bias current inverting –3.0 3.0 μA 1
VIO Input offset voltage NAB –0.3 0.3 mV 1
NAC –1.0 1.0
(1) The algebraic convention, whereby the most negative value is a minimum and most positive is a maximum, is used in this table. Negative current shall be defined as conventional current flow out of a device terminal.