JAJSUR0F August   2003  – October 2024 SN74LV4053A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information: SN74LV4053A-Q1
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics VCC = 2.5 V ± 0.2 V
    7. 5.7 Timing Characteristics VCC = 3.3 V ± 0.3 V
    8. 5.8 Timing Characteristics VCC = 5 V ± 0.5 V
    9. 5.9 AC Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Design Requirements
    4. 8.4 Detailed Design Procedure
    5. 8.5 Power Supply Recommendations
    6. 8.6 Layout
      1. 8.6.1 Layout Guidelines
      2. 8.6.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
VCC Supply voltage 1(2) 5.5 V
VIH High-level input voltage,
logic control inputs		 VCC = 1.65 1.2 5.5 V
VCC = 2 V 1.5 5.5
VCC = 2.3 V to 2.7 V VCC x 0.7 5.5
VCC = 3 V to 3.6 V VCC x 0.7 5.5
VCC = 4.5 V to 5.5 V VCC x 0.7 5.5
VIL Low-level input voltage,
logic control inputs		 VCC = 1.65 V 0 0.4 V
VCC = 2 0 0.5
VCC = 2.3V to 2.7V 0 VCC x 0.3
VCC = 3 V to 3.6 V 0 VCC x 0.3
VCC = 4.5 V to 5.5 V 0 VCC x 0.3
VI Logic control input voltage 0 5.5 V
VIO Switch input or output voltage 0 VCC V
Δt/ΔV Logic input transition rise or fall rate VCC = 1.0 V to 2.0 V 500 ns/V
VCC = 2.0 V to 2.7 V 200
VCC = 3 V to 3.6 V 100
VCC = 4.5 V to 5.5 V 20
TA Ambient temperature –40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to TI application report Implications of Slow or Floating CMOS Inputs, SCBA004.
(2) When using a VCC of ≤1.2 V, it is recommended to use these devices only for transmitting digital signals.When supply voltage is near 1.2 V the analog switch ON resistance becomes very non-linear