JAJSUT1B June   2024  – November 2024 TUSB2E221

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Variants
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Parametric Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB 2.0
      2. 8.3.2 eUSB2
      3. 8.3.3 Cross MUX
    4. 8.4 Device Functional Modes
      1. 8.4.1  Repeater Mode
      2. 8.4.2  Power-Down Mode
      3. 8.4.3  UART Mode
      4. 8.4.4  Auto-Resume ECR
      5. 8.4.5  L2 State Interrupt Modes
      6. 8.4.6  Attach Detect Interrupt Mode
      7. 8.4.7  GPIO Mode
        1. 8.4.7.1 EQ0 as GPIO0
        2. 8.4.7.2 EQ1 as GPIO1
        3. 8.4.7.3 EQ2/INT as GPIO2
      8. 8.4.8  CROSS
      9. 8.4.9  USB 2.0 High-Speed HOST Disconnect Detection
      10. 8.4.10 Frame Based Low Power Mode
    5. 8.5 Programming
      1. 8.5.1 I2C Target Interface
      2. 8.5.2 Register Access Protocol (RAP)
  10. 9 Register Map
    1. 9.1 TUSB2E221 Registers
  11. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application: Dual Port System
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 eUSB PHY Settings Recommendation
      3. 10.2.3 Application Curve
    3. 10.3 Power Supply Recommendations
      1. 10.3.1 Power-Up Reset
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Example Layout
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

8.4.10 Frame Based Low Power Mode

The USB2.0 standard defines high-speed microframes that occur every 125μs. Using a patented design, the TUSB2E221 monitors idle conditions within every high-speed microframe. The TUSB2E221 will enter a low power state if the bus is idle for greater than 7.8125μs and will remain in the low power state until the start of the next μSOF. This feature is enabled by default and can be disabled by clearing HOST_FRAME_LP_EN_Px or DEVICE_FRAME_LP_EN_Px bits.

Table 8-4 shows an example of the typical high-speed idle power the TUSB2E221 consumes based on whether or not the frame based low power is enabled. These results assume the TUSB2E221 is in host repeater mode.

Table 8-4 Typical Single Port High-Speed Idle Power for Frame Base LP Mode
HOST_FRAME_LP_EN_Px 1.8V current (mA) 3.3V current (mA)
0 (Disabled) 56 2.8
1 (Enabled) 12 2.0

Note: Frame based low power mode is enabled by default. If using TUSB2E221 in pin-strap mode, this feature can not be disabled. Contact support if a device variant with frame based low power mode disabled in pin-strap mode is needed.