JAJSUX5 June   2024 TMUX1308A-Q1 , TMUX1309A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information: TMUX1308A-Q1
    4. 6.4  Thermal Information: TMUX1309A-Q1
    5. 6.5  Recommended Operating Conditions
    6. 6.6  Electrical Characteristics
    7. 6.7  Logic and Dynamic Characteristics
    8. 6.8  Timing Characteristics
    9. 6.9  Injection Current Coupling
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  Break-Before-Make
    6. 7.6  tON(EN) and tOFF(EN)
    7. 7.7  Charge Injection
    8. 7.8  Off Isolation
    9. 7.9  Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 Injection Current Control
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
      5. 8.3.5 High-Impedance Optimization
      6. 8.3.6 Injection Current Control
        1. 8.3.6.1 TMUX13xxA-Q1 is Powered, Channel is Unselected, and the Input Signal is Greater Than VDD (VDD = 5V, VINPUT = 5.5V)
        2. 8.3.6.2 TMUX13xxA-Q1 is Powered, Channel is Selected, and the Input Signal is Greater Than VDD (VDD = 5V, VINPUT = 5.5V)
        3. 8.3.6.3 TMUX13xxA-Q1 is Unpowered and the Input Signal has a Voltage Present (VDD = 0V, VINPUT = 3V)
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Short To Battery Protection
      4. 9.2.4 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information
  13. 12Revision History

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
VDD Supply voltage –0.5 6 V
VSEL or VEN Logic control input pin voltage (EN, A0, A1, A2) –0.5 6
VS or VD Source or drain voltage (Sx, D) –0.5 VDD+1.0
ISEL or IEN Logic control input pin current (EN, A0, A1, A2)  –30 30 mA
IS or ID (CONT) Continuous current through switch (Sx, D pins) –40°C to +85°C –50 50
IS or ID (CONT) Continuous current through switch (Sx, D pins) –40°C to +125°C –25 25
IGND Continuous current through GND –100 100
Ptot Total power dissipation(4) 500 mW
Tstg Storage temperature –65 150 °C
TJ Junction temperature 150
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(3) All voltages are with respect to ground, unless otherwise specified.
(4) For TSSOP package: Ptot derates linearily above TA = 80°C by 7.2mW/°C.