JAJSUY7 May   2024 MCT8316A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Auto
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Output Stage
      2. 6.3.2  Device Interface Modes
        1. 6.3.2.1 Interface - Control and Monitoring
        2. 6.3.2.2 I2C Interface
      3. 6.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 6.3.3.1 Buck in Inductor Mode
        2. 6.3.3.2 Buck in Resistor mode
        3. 6.3.3.3 Buck Regulator with External LDO
        4. 6.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 6.3.3.5 Mixed Mode Buck Operation and Control
        6. 6.3.3.6 Buck Undervoltage Protection
        7. 6.3.3.7 Buck Overcurrent Protection
      4. 6.3.4  AVDD Linear Voltage Regulator
      5. 6.3.5  Charge Pump
      6. 6.3.6  Slew Rate Control
      7. 6.3.7  Cross Conduction (Dead Time)
      8. 6.3.8  SPEED Control
        1. 6.3.8.1 Analog-Mode Speed Control
        2. 6.3.8.2 PWM-Mode Speed Control
        3. 6.3.8.3 I2C based Speed Control
        4. 6.3.8.4 Frequency-Mode Speed Control
      9. 6.3.9  Starting the Motor Under Different Initial Conditions
        1. 6.3.9.1 Case 1 – Motor is Stationary
        2. 6.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 6.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 6.3.10 Motor Start Sequence (MSS)
        1. 6.3.10.1 Initial Speed Detect (ISD)
        2. 6.3.10.2 Motor Resynchronization
        3. 6.3.10.3 Reverse Drive
        4. 6.3.10.4 Motor Start-up
          1. 6.3.10.4.1 Align
          2. 6.3.10.4.2 Double Align
          3. 6.3.10.4.3 Initial Position Detection (IPD)
            1. 6.3.10.4.3.1 IPD Operation
            2. 6.3.10.4.3.2 IPD Release Mode
            3. 6.3.10.4.3.3 IPD Advance Angle
          4. 6.3.10.4.4 Slow First Cycle Startup
          5. 6.3.10.4.5 Open loop
          6. 6.3.10.4.6 Transition from Open to Closed Loop
      11. 6.3.11 Closed Loop Operation
        1. 6.3.11.1 120o Commutation
          1. 6.3.11.1.1 High-Side Modulation
          2. 6.3.11.1.2 Low-Side Modulation
          3. 6.3.11.1.3 Mixed Modulation
        2. 6.3.11.2 Variable Commutation
        3. 6.3.11.3 Lead Angle Control
        4. 6.3.11.4 Closed loop accelerate
      12. 6.3.12 Speed Loop
      13. 6.3.13 Input Power Regulation
      14. 6.3.14 Anti-Voltage Surge (AVS)
      15. 6.3.15 Output PWM Switching Frequency
      16. 6.3.16 Fast Start-up (< 50 ms)
        1. 6.3.16.1 BEMF Threshold
        2. 6.3.16.2 Dynamic Degauss
      17. 6.3.17 Fast Deceleration
      18. 6.3.18 Active Demagnetization
        1. 6.3.18.1 Active Demagnetization in action
      19. 6.3.19 Motor Stop Options
        1. 6.3.19.1 Coast (Hi-Z) Mode
        2. 6.3.19.2 Recirculation Mode
        3. 6.3.19.3 Low-Side Braking
        4. 6.3.19.4 High-Side Braking
        5. 6.3.19.5 Active Spin-Down
      20. 6.3.20 FG Configuration
        1. 6.3.20.1 FG Output Frequency
        2. 6.3.20.2 FG Open-Loop and Lock Behavior
      21. 6.3.21 Protections
        1. 6.3.21.1  VM Supply Undervoltage Lockout
        2. 6.3.21.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 6.3.21.3  BUCK Undervoltage Lockout (BUCK_UV)
        4. 6.3.21.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 6.3.21.5  Overvoltage Protection (OVP)
        6. 6.3.21.6  Overcurrent Protection (OCP)
          1. 6.3.21.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 6.3.21.6.2 OCP Automatic Retry (OCP_MODE = 01b)
          3. 6.3.21.6.3 OCP Report Only (OCP_MODE = 10b)
          4. 6.3.21.6.4 OCP Disabled (OCP_MODE = 11b)
        7. 6.3.21.7  Buck Overcurrent Protection
        8. 6.3.21.8  Cycle-by-Cycle (CBC) Current Limit (CBC_ILIMIT)
          1. 6.3.21.8.1 CBC_ILIMIT Automatic Recovery next PWM Cycle (CBC_ILIMIT_MODE = 000xb)
          2. 6.3.21.8.2 CBC_ILIMIT Automatic Recovery Threshold Based (CBC_ILIMIT_MODE = 001xb)
          3. 6.3.21.8.3 CBC_ILIMIT Automatic Recovery after 'n' PWM Cycles (CBC_ILIMIT_MODE = 010xb)
          4. 6.3.21.8.4 CBC_ILIMIT Report Only (CBC_ILIMIT_MODE = 0110b)
          5. 6.3.21.8.5 CBC_ILIMIT Disabled (CBC_ILIMIT_MODE = 0111b or 1xxxb)
        9. 6.3.21.9  Lock Detection Current Limit (LOCK_ILIMIT)
          1. 6.3.21.9.1 LOCK_ILIMIT Latched Shutdown (LOCK_ILIMIT_MODE = 00xxb)
          2. 6.3.21.9.2 LOCK_ILIMIT Automatic Recovery (LOCK_ILIMIT_MODE = 01xxb)
          3. 6.3.21.9.3 LOCK_ILIMIT Report Only (LOCK_ILIMIT_MODE = 1000b)
          4. 6.3.21.9.4 LOCK_ILIMIT Disabled (LOCK_ILIMIT_MODE = 1xx1b)
        10. 6.3.21.10 Thermal Warning (OTW)
        11. 6.3.21.11 Thermal Shutdown (TSD)
        12. 6.3.21.12 Motor Lock (MTR_LCK)
          1. 6.3.21.12.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)
          2. 6.3.21.12.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)
          3. 6.3.21.12.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)
          4. 6.3.21.12.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)
        13. 6.3.21.13 Motor Lock Detection
          1. 6.3.21.13.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 6.3.21.13.2 Lock 2: Loss of Sync (LOSS_OF_SYNC)
          3. 6.3.21.13.3 Lock3: No-Motor Fault (NO_MTR)
        14. 6.3.21.14 IPD Faults
    4. 6.4 Device Functional Modes
      1. 6.4.1 Functional Modes
        1. 6.4.1.1 Sleep Mode
        2. 6.4.1.2 Standby Mode
        3. 6.4.1.3 Fault Reset (CLR_FLT)
    5. 6.5 External Interface
      1. 6.5.1 DRVOFF Functionality
      2. 6.5.2 DAC outputs
      3. 6.5.3 SOX Output
      4. 6.5.4 Oscillator Source
        1. 6.5.4.1 External Clock Source
      5. 6.5.5 External Watchdog
    6. 6.6 EEPROM access and I2C interface
      1. 6.6.1 EEPROM Access
        1. 6.6.1.1 EEPROM Write
        2. 6.6.1.2 EEPROM Read
      2. 6.6.2 I2C Serial Interface
        1. 6.6.2.1 I2C Data Word
        2. 6.6.2.2 I2C Write Operation
        3. 6.6.2.3 I2C Read Operation
        4. 6.6.2.4 Examples of MCT8316A-Q1 I2C Communication Protocol Packets
        5. 6.6.2.5 Internal Buffers
        6. 6.6.2.6 CRC Byte Calculation
    7. 6.7 EEPROM (Non-Volatile) Register Map
      1. 6.7.1 Algorithm_Configuration Registers
      2. 6.7.2 Fault_Configuration Registers
      3. 6.7.3 Hardware_Configuration Registers
      4. 6.7.4 Gate_Driver_Configuration Registers
    8. 6.8 RAM (Volatile) Register Map
      1. 6.8.1 Fault_Status Registers
      2. 6.8.2 System_Status Registers
      3. 6.8.3 Algo_Control Registers
      4. 6.8.4 Device_Control Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Application Curves
        1. 7.2.1.1 Motor startup
        2. 7.2.1.2 120o and variable commutation
        3. 7.2.1.3 Faster startup time
        4. 7.2.1.4 Setting the BEMF threshold
        5. 7.2.1.5 Maximum speed
        6. 7.2.1.6 Faster deceleration
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
        1. 7.4.3.1 Power Dissipation
  9. 8 Device and Documentation Support
    1. 8.1 サポート・リソース
    2. 8.2 Trademarks
    3. 8.3 静電気放電に関する注意事項
    4. 8.4 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.10 Motor Start Sequence (MSS)

Figure 6-18 shows the motor-start sequence implemented in the MCT8316A-Q1 device.

MCT8316A-Q1 Motor Start-up Sequence Figure 6-18 Motor Start-up Sequence
    Power-On State This is the initial state of the Motor Start Sequence (MSS) when MCT8316A-Q1 is powered on. In this state, MCT8316A-Q1 configures the peripherals, initializes the algorithm parameters from EEPROM and prepares for driving the motor.
    Sleep/Standby In this state, SPEED_REF/POWER_REF/TARGET_DUTY is set to zero and MCT8316A-Q1 is either in sleep or standby mode depending on DEV_MODE and SPEED/WAKE pin voltage.
    SPEED_REF/POWER_REF/TARGET_DUTY > 0 Judgement When SPEED_REF/POWER_REF/TARGET_DUTY is set to greater than zero, MCT8316A-Q1 exits the sleep/standby state and proceeds to ISD_EN judgement. As long as SPEED_REF is set to zero, MCT8316A-Q1 stays in sleep/standby state.
    ISD_EN Judgement MCT8316A-Q1 checks to see if the initial speed detect (ISD) function is enabled (ISD_EN = 1b). If ISD is enabled, MSS proceeds to the BEMF < STAT_DETECT_THR judgement. Instead, if ISD is disabled, the MSS proceeds directly to the BRAKE_EN judgement.
    BEMF < STAT_DETECT_THR or BEMF < FG_BEMF_THR Judgement ISD determines the initial condition (speed, angle, direction of spin) of the motor (see Section 6.3.10.1). If motor is deemed to be stationary (BEMF < STAT_DETECT_THR or BEMF < FG_BEMF_THR), the MSS proceeds to second BEMF < STAT_DETECT_THR judgement. If the motor is not stationary, MSS proceeds to verify the direction of spin.
    Direction of spin Judgement The MSS determines whether the motor is spinning in the forward or the reverse direction. If the motor is spinning in the forward direction, the MCT8316A-Q1 proceeds to the RESYNC_EN judgement. If the motor is spinning in the reverse direction, the MSS proceeds to the RVS_DR_EN judgement.
    RESYNC_EN Judgement If RESYNC_EN is set to 1b, MCT8316A-Q1 proceeds to BEMF > RESYNC_MIN_THRESHOLD judgement. If RESYNC_EN is set to 0b, MSS proceeds to HIZ_EN judgement.
    BEMF > RESYNC_MIN_THRESHOLD Judgement If motor speed is such that BEMF > RESYNC_MIN_THRESHOLD, MCT8316A-Q1 uses the speed and position information from ISD to transition to the closed loop state (see Section 6.3.10.2) directly. If BEMF < RESYNC_MIN_THRESHOLD, MCT8316A-Q1 proceeds to BEMF < STAT_DETECT_THR judgement.
    BEMF < STAT_DETECT_THR Judgement If motor speed is such that BEMF > STAT_DETECT_THR, MCT8316A-Q1 proceeds to motor coast timeout. If BEMF < STAT_DETECT_THR, MCT8316A-Q1 proceeds to STAT_BRK_EN judgement.
    Motor Coast Timeout MCT8316A-Q1 waits for 200000 PWM cycles for the motor to coast down to a speed where BEMF < STAT_DETECT_THR; after 200000 PWM cycles lapse in the motor coast state, MCT8316A-Q1 proceeds to STAT_BRK_EN judgement irrespective of BEMF. If BEMF < STAT_DETECT_THR during motor coast before the 200000 cycle timeout, MCT8316A-Q1 proceeds to STAT_BRK_EN judgement immediately.
    STAT_BRK_EN Judgement The MSS checks if the stationary brake function is enabled (STAT_BRK_EN =1b). If the stationary brake function is enabled, the MSS advances to the stationary brake routine. If the stationary brake function is disabled, the MSS advances to motor start-up state (see Section 6.3.10.4).
    Stationary Brake Routine The stationary brake routine can be used to ensure the motor is completely stationary before attempting to start the motor. The stationary brake is applied by turning on all three low-side driver MOSFETs for a time configured by STARTUP_BRK_TIME.
    RVS_DR_EN Judgement The MSS checks to see if the reverse drive function is enabled (RVS_DR_EN = 1b). If it is enabled, the MSS transitions to check speed of the motor in reverse direction. If the reverse drive function is not enabled (RVS_DR_EN = 0b), the MSS advances to the HIZ_EN judgement.
    Speed > MIN_DUTY Judgement The MSS checks if the speed (in reverse direction) is higher than the speed at MIN_DUTY - till the speed (in reverse direction) is higher than the speed at MIN_DUTY, MSS stays in reverse closed loop deceleration. When speed (in reverse direction) drops below the speed at MIN_DUTY, the MSS transitions to reverse open loop deceleration.
    Reverse Open Loop Deceleration and Zero Speed Crossover In reverse open loop deceleration, the MCT8316A-Q1 decelerates the motor in open-loop till speed reaches zero. At zero speed, direction changes and MCT8316A-Q1 begins open loop acceleration.
    HIZ_EN Judgement The MSS checks to determine whether the coast (Hi-Z) function is enabled (HIZ_EN = 1b). If the coast function is enabled (HIZ_EN = 1b), the MSS advances to the coast routine. If the coast function is disabled (HIZ_EN = 0b), the MSS advances to the BRAKE_EN judgement.
    Coast (Hi-Z) Routine The device coasts the motor by turning OFF all six MOSFETs for a certain time configured by HIZ_TIME.
    BRAKE_EN Judgement The MSS checks to determine whether the brake function is enabled (BRAKE_EN = 1b). If the brake function is enabled (BRAKE_EN = 1b), the MSS advances to the brake routine. If the brake function is disabled (BRAKE_EN = 0b), the MSS advances to the motor start-up state (see Section 6.3.10.4).
    Brake Routine MCT8316A-Q1 implements a brake by turning on all three (high-side or low-side) MOSFETS for BRK_TIME. Brake is applied either using high-side or low-side MOSFETs based on BRK_MODE configuration.
    Closed Loop In this state, the MCT8316A-Q1 drives the motor with sensorless trapezoidal commutation based on either zero cross detection or BEMF integration.