JAJSV33D January   2001  – July 2024 CD54AC02 , CD74AC02

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 概要
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics, VCC = 1.5 V
    7. 4.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    8. 4.8 Switching Characteristics, VCC = 5 V ± 0.5 V
    9. 4.9 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

3 Pin Configuration and Functions

CD54AC02 CD74AC02 CD54AC02 J Package, 16-Pin CDIP; CD74AC02 N or D Package; 16-Pin PDIP or SOIC (Top View)Figure 3-1 CD54AC02 J Package, 16-Pin CDIP; CD74AC02 N or D Package; 16-Pin PDIP or SOIC (Top View)
Table 3-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME CDx4AC02
SOIC, PDIP, CDIP
1A 2 I 1A Input
1B 3 I 1B Input
1Y 1 O 1Y Output
2A 5 I 2A Input
2B 6 I 2B Input
2Y 4 O 2Y Output
3A 8 I 3A Input
3B 9 I 3B Input
3Y 10 O 3Y Output
4A 11 I 4A Input
4B 12 I 4B Input
4Y 13 O 4Y Output
GND 7 — Ground Pin
NC — — No Connection
VCC 14 — Power Pin
(1) I = input, O = output