JAJSVC5 September   2024 TMUX1219-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (VDD = 5V ±10 %)
    6. 5.6 Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 5.7 Electrical Characteristics (VDD = 1.8V ±10 %)
    8. 5.8 Electrical Characteristics (VDD = 1.2V ±10 %)
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 On-Resistance
    2. 6.2 Off-Leakage Current
    3. 6.3 On-Leakage Current
    4. 6.4 Transition Time
    5. 6.5 Break-Before-Make
    6. 6.6 Charge Injection
    7. 6.7 Off Isolation
    8. 6.8 Crosstalk
    9. 6.9 Bandwidth
  8. 7 Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 Bidirectional Operation
      2. 7.2.2 Rail to Rail Operation
      3. 7.2.3 1.8 V Logic Compatible Inputs
      4. 7.2.4 Fail-Safe Logic
    3. 7.3 Device Functional Modes
    4. 7.4 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Switchable Operational Amplifier Gain Setting
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Input Control for Power Amplifier
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Information
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

6.6 Charge Injection

The TMUX1219-Q1 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted by the symbol QC. Figure 6-6 shows the setup used to measure charge injection from Drain (D) to Source (Sx).

TMUX1219-Q1 Charge-Injection Measurement SetupFigure 6-6 Charge-Injection Measurement Setup