JAJSVN4A September   2011  – November 2024 ISO7231C-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Characteristics
    5. 4.5  Power Ratings
    6. 4.6  Insulation Specifications
    7. 4.7  Safety-Related Certifications
    8. 4.8  Safety Limiting Values
    9. 4.9  Electrical Characteristics: VCC1 and VCC2 at 3.3 V Operation
    10. 4.10 Electrical Characteristics: VCC1 and VCC2 at 5-V Operation
    11. 4.11 Electrical Characteristics: VCC1 at 3.3-V, VCC2 at 5-V Operation
    12. 4.12 Electrical Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    13. 4.13 Switching Characteristics: VCC1 and VCC2 at 3.3-V Operation
    14. 4.14 Switching Characteristics: VCC1 and VCC2 at 5-V Operation
    15. 4.15 Switching Characteristics: VCC1 at 3.3-V and VCC2 at 5-V Operation
    16. 4.16 Switching Characteristics: VCC1 at 5-V, VCC2 at 3.3-V Operation
    17. 4.17 Typical Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Function Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device I/O Schematics
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Insulation Characteristics Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 PCB Material
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4.15 Switching Characteristics: VCC1 at 3.3-V and VCC2 at 5-V Operation

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay See Figure 5-1 20 51 ns
PWD Pulse-width distortion(1) |tPHL – tPLH| 4
tsk(pp) Part-to-part skew (2) 10 ns
tsk(o) Channel-to-channel output skew (3) 0 4 ns
tr Output signal rise time See Figure 5-1 2.4 ns
tf Output signal fall time 2.3
tPHZ Propagation delay, high-level-to-high-impedance output See Figure 5-2 15 25 ns
tPZH Propagation delay, high-impedance-to-high-level output 15 25
tPLZ Propagation delay, low-level-to-high-impedance output 15 25
tPZL Propagation delay, high-impedance-to-low-level output 15 25
tfs Failsafe output delay time from input power loss See Figure 5-3 12 μs
(1) Also known as pulse skew
(2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
(3) tsk(o) is the skew between specified outputs of a single device with all driving inputs connected together and the outputs switching in the same direction while driving identical specified loads.