このリファレンス・デザインには、高電圧バスからシャーシ・グランドへの絶縁抵抗を監視する機能があります。結合デバイスと部品の高電圧からシャーシ・グランドへの絶縁強度を監視することは、HEV や EV において必須の機能です。これは、バッテリ管理システム、トラクション・インバータ、DC/DC コンバータ、オンボード充電器、その他のサブシステムが高電圧 (60V を超える) で動作するためです。
TIDA-01513 | デザイン・フォルダ |
AMC1301-Q1 | プロダクト・フォルダ |
TPSI2140-Q1 | プロダクト・フォルダ |
OPA2348-Q1 | プロダクト・フォルダ |
OPA320-Q1 | プロダクト・フォルダ |
SN6501-Q1 | プロダクト・フォルダ |
TL4050B25-Q1 | プロダクト・フォルダ |
TPS763-Q1 | プロダクト・フォルダ |
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In response to the latest changes in global environmental conditions and to reduce greenhouse gases, there is a need to have hybrid or electric traction units, which have very low or zero emissions. In a hybrid electric vehicle (HEV) or electric vehicle (EV), high-voltage batteries are used as storage elements to power the wheels. High-voltage batteries for automotive systems are defined as those with ≥ 60 V. Onboard chargers or external DC converters are used to source the power. Meanwhile, high-voltage batteries are used to store that energy. DC/DC converters and motor control inverters are used to power the wheels and other subsystems such as heating, ventilating, and air conditioning (HVAC). All these subsystems are working on high voltage.
High-voltage components in HEV or EV systems are typically isolated from the chassis for functional and occupant safety reasons. The level of isolation in systems completely depends on the application, subsystem location within the vehicle, and the effective peak operating voltage. In general, HEVs and EVs use functional, basic, and reinforced isolation-based devices (see Figure 1-2). Functional isolation is used for protecting ground loops and the operation of those devices. Basic isolation is a single level of isolation which provides basic protection against electric shock. Reinforced isolation is a double level of isolation which provides higher protection against electric shock. Automotive power-train system developers should select basic or reinforced isolated components based on the voltage of the battery and peak voltages of the onboard charger and inverter.
Isolation is a critical parameter for the safety of HEV and EV systems. Due to many factors such as improper motor winding, deteriorating wiring harnesses, general aging, and power dissipation, the operating temperature and peak electrical stress on semiconductors may lead to degradation or loss of isolation in these HEV and EV systems. Any single point for failure of isolation loss does not have much impact on the operation of the system, but it does become a potential life risk when operators make contact with this high-voltage operating environment. Vehicle manufacturers need to have a mechanism to detect every single point failure of isolation in a complete system and have a necessary preventive action in place. Measure isolation resistance and insulation leakage currents to check the safety of occupants in the HEV or EV system. As per FMVSS 305 specification, at least 500 Ω/V of isolation resistance must be maintained from high-voltage systems to chassis ground. Depending on the leakage current measured, HEV/EV system error-handling functions may be designed to take appropriate actions.. Functions or systems will be built to disconnect high-voltage relays and discharge the DC-link capacitors.
Checking the leakage or low ohmic resistance paths from high-voltage nets to the low-voltage chassis ground is important. The necessary isolation resistance is calculated based on battery voltage, creating a isolation breakage path and monitoring the deflections as explained in this design guide. Based on the vehicle architecture, the number of sampling points for isolation leakage measurements varies.
PARAMETER | SPECIFICATIONS | MAXIMUM (MEASUREMENTS) |
---|---|---|
Voltage measurement accuracy | Measurements are done at room temperature. Deviations observed in measured values compared to calculated values. | 0.624% |
Isolated leakage current accuracy | 0.621% | |
ISO_POS accuracy | 0.48% | |
ISO_Neg accuracy | 0.126% |
The TPSI2140-Q1 is an isolated solid state relay designed for high voltage automotive and industrial applications. The primary side of the device consists of four differential drivers which deliver power and enable logic information to each of the internal MOSFETs on the secondary side. This device uses capacitive isolation technology in combination with its internal back-to-back MOSFETs to form a completely integrated solution requiring no secondary side power supply. When the enable pin is brought HI, the oscillator starts and the drivers send power and a logic HI across the barrier. When the enable pin is brought LO or the VDD falls below the UVLO threshold, the drivers are disabled. The lack of activity communicates a logic LO to the secondary side and the MOSFETs are disabled.
Key features include:
The AMC1301 device is a fully-differential, precision, isolated amplifier. The input stage of the device consists of a fully-differential amplifier that drives a second-order, delta-sigma (ΔΣ) modulator. The modulator uses the internal voltage reference and clock generator to convert the analog input signal to a digital bit stream. The drivers transfer (TX) the output of the modulator across the isolation barrier that separates the high-side and low-side voltage domains. The received bit stream and clock are synchronized and processed by a fourth-order analog filter on the low-side and presented as a differential output of the device.
Figure 2-4 shows the AMC1301-Q1 block diagram.
The SiO2-based, double-capacitive isolation barrier supports a high level of magnetic field immunity, as described in ISO72x Digital Isolator Magnetic-Field Immunity . The digital modulation used in the AMC1301 device and the isolation barrier characteristics result in high reliability and common-mode transient immunity (CMTI).
Key features include:
The SN6501-Q1 is a transformer driver designed for low-cost, small form-factor, isolated DC/DC converters using push-pull topology. The device includes an oscillator that feeds a gate drive circuit. The gate drive, comprising a frequency divider and a break-before-make (BBM) logic, provides two complementary output signals that alternately turn the two output transistors ON and OFF. The output frequency of the oscillator is divided down by an asynchronous divider that provides two complementary output signals with a 50% duty cycle. A subsequent BBM logic inserts a dead time between the high-pulses of the two signals. The resulting output signals present the gate-drive signals for the output transistors. As shown in Figure 2-5, before either one of the gates can assume logic high, there must be a short time period during which both signals are low and both transistors are high impedance. Known as BBM time, this short period is required to avoid shorting out both ends of the primary.
Key features include:
Isolation leakage measurements are typically performed in one of the subsystems in an HEV or EV system. Predicting the isolation breakage location is difficult and not possible to dousing isolated measurement techniques. The most effective way to measure isolated leakage current is by breaking the isolation of a complete system with a known resistance. If there is no current flowing between the switched path, then there is no parallel path which indicates that system is safe without any isolation breakages.
Designers must understand the type of failure and calculate the accurate isolation breakage parameters such as location (voltage) and resistance to classify the severity level. Isolation leakage resistance provides the information about the possible amount of leakage current for the second path, which can potentially electrocute the operator or passenger. To obtain a complete board diagnosis, break the isolation at two locations with known resistance paths.
Figure 2-6 is one of the examples of isolation breakage measurements using this reference design. S1 and S2 are relays used to switch the measurement paths. Rps1 and Rps2 are resistors used in the high-resistance path from the positive line whereas Rns1 and Rns2 are resistors used in the negative line. Rs1 and Rs2 are the series resistors used for isolation current measurements. An inverting op-amp configuration with VREF (bias supply) is used for the measurements.
During normal conditions when S1 is closed, no leakage enters the circuit because there is no closed path. The ideal condition is to set the VREF potential at Rps1 and Rps2 with respect to chassis ground. ISO_POS must still stay at VREF voltage when S1 is closed. In a practical circuit based on the type of op amp, its input differential voltage, and bias currents, variations will occur in ISO_POS voltage measurements. The circuit behavior is similar when only S2 is closed, as shown in Figure 2-7.
Figure 2-8 shows that, if both switches are closed, leakage current from a high-voltage battery flows using the chassis ground of the HEV or EV. Select resistors Rps1, Rps2, Rns1, and Rns2 such that they have very low leakage current (< 1 mA) in the chassis ground for the maximum battery voltage.
As per Equation 6, the VREF and resistors are fixed. Measure the ISO_POS with a 16-bit or 12-bit analog-to-digital converter (ADC) for better precision and resolution. Compare the measured value of ISO_POS with the known parameters of HV battery voltage and resistors used in the design. System calculations must have accurate voltage measurements. If the calculated value is beyond the tolerance level of the system, then consider it to be isolation breakage in the system. To minimize the error in the system, it is important to select high-precision metal electrode leadless face (MELF) resistors and op amps with low offset and bias currents. The designer can measure the offset voltage of the opamp and calibrate it in the system. Calibrating the input bias currents of opamps is difficult and they greatly influence measurements of the isolation leakage currents.
As stated in Section 1, there are multiple root causes for the isolation breakage in the system. If the isolation breakage happens at the positive line of a high-voltage system, the circuit behavior is as shown in Figure 2-9. Riso is the isolation resistance from the high-voltage positive line to chassis ground, it can be as low as mΩ to MΩ. To perform the safety analysis, the designer must first identify the resistance of the isolation breakage and location. When only S1 is closed, there is no closed path for the high-voltage battery. Only leakage current flows from the low-voltage system due to the reference bias potential on the high-voltage line. The leakage current is negligible when only S1 is closed because the reference voltage is low (< 5 V) and the resistors are quite high (Rps1 + Rps2 > 500 kΩ).
When only S2 is closed, the high-voltage battery is in series with Rns1, Rns2, Riso, and VREF. A significant leakage current flows from the high-voltage section to the chassis ground based on the battery voltage, Rns1, and Rns2. This is the actual leakage current from high-voltage to chassis ground, which can be measured at ISO_NEG.
Figure 2-10 shows an equivalent circuit for isolation leakage current measurements when both S1 and S2 are closed. Considering that precision components are used in the circuit, input impedance, bias currents, and offset voltages of op amps are neglected.
Leakage currents in Figure 2-10 can be calculated by using the superposition of voltage sources. With the same reference supply and no offset voltage in the op amps, the leakage currents due to the VREF supply is negligible and canceled in the circuit (because of symmetry). HV_BATT is the significant voltage source which contributes to leakage current in the chassis ground. If Riso is too low, then the I_Leak2 current shown in Figure 2-10 will be negligible. The key contributor variable leakage currents are the HV_BATT power source and isolation resistance. The measurements of ISO_N are significant because they can be used to find the leakage currents and isolation resistance when an isolation error occurs at a high-voltage positive terminal.
A similar analysis of the leakage currents is valid with the error at a negative potential. A couple of equations will change, but most of the theory remains the same. Measurements of ISO_POS are significant when an isolation error at the negative terminal of the high-voltage battery exists.
High-voltage measurement is required to calculate the isolation leakage current. In TIDA-01537 , the AMC1301-Q1 device is used to perform these measurements. The AMC1311B has a high input resistance, a 2-V input range, and can also be used for high-voltage measurements.
As Figure 2-11 shows, the Rsh monitoring resistor is placed in series to a high-ohmic potential divider network. Voltage measurements are performed with a floating ground of the AMC1301-Q1. The OPA320-Q1 device is used to amplify the signal range and give a single-ended output to an MCU or logic interface. The AMC1301-Q1 can measure a bidirectional signal of ±250 mV. In HEV or EV motors, battery voltages are only in the positive range, so the usable range of the AMC1301-Q1 is 250 mV. A potential divider network must be chosen in such a way that the voltage drop in shunt resistance must be ≤ 250 mV at the maximum battery voltages.
Use Equation 5 to calculate the high battery voltage.
where
Equation 5 is a simple equation that does not consider the influences of bias currents or offset voltages, which can lead to deviations in measurements.
Hardware that measures isolation resistance is built with a high-voltage measurement circuit and isolation breaking circuit. As previous sections have explained, isolation measuring and a high-voltage monitoring circuit is implemented in the schematics and printed-circuit board (PCB). Use the OPA2348-Q1 and OPA320-Q1 op amps to reduce the error in high-voltage leakage current and voltage measurements.
As Figure 3-1 shows, MELF resistors R14, R15, R16, R17, and R18 are used for a potential divider circuit for the high-voltage positive line, whereas R21, R22, R23, R24, and R25 are used for a potential divider circuit for the high-voltage line. C17 and C22 are placed only in the schematic and layout to filter relay switching noise. These capacitors are not used in performance testings because they are a potential weak link for performance and reliability in mass production. MELF resistors are chosen to have less tolerance, high reliability, and a low temperature coefficient of resistance (TCR). Any deviation in resistor values have an impact on the error of interlock leakage current calculations.
R12 and R19 are chosen based on the battery voltage and signal range of isolation leakage current. Because the resistance and power dissipation is low, there is a possibility to select a high-precision resistance to calculate accurate leakage current. The OPA2348-Q1 is used for U5A and U5B, which support the voltage measurement with an applied offset given by VREF2.5V. The ISO POS and ISO NEG voltage change based on the state of battery voltage and the state of U6 and U7 relays. Q1 and Q2 are small signal transistors to control the relays. D3 and D4 are freewheeling diodes for relay coils (see Figure 3-2).
Isolated power is required for isolated high-voltage measurements with the AMC1301-Q1 or AMC1311-Q1. The SN6501-Q1 transformer driver is used to transfer the power from T1 primary to secondary. D1 and D2 are used to rectify the power on the secondary side of the transformer. Based on turns ratio and operation of the SN6501-Q1, the output of D1 and D2 will be in the range of 6.2 V to 7 V. The TPS76350-Q1 device is used to regulate the output voltage to 5 V.
VCC5V_ISO is used to supply the secondary side of the AMC1301-Q1 device (see Figure 3-3). GNDi is completely floating in the high-voltage power line. R1, R2, R3, R4, R5, and R6 are the MELF resistors used for the potential divider. R7 is the shunt resistor for voltage measurement. Selecting R7 heavily depends on the input measurement range of the AMC1301-Q1 device (250 mV) and voltage range of the battery.
VREF2.5V is generated by using the TL4050-Q1 or REF5025-Q1. R33 and R34 are the population variants for choosing the reference voltage. TL4050-Q1 is the typical choice for the reference voltage to support the isolation leakage current measurements.
Solid-State Relays used to replace EMRs in leakage current measurement.
Solid-State Relay test results are shown below original design testing see Solid-State Relay Isolation Tests.
Measuring system isolation is possible by breaking the isolation internal to this reference design. For this task, build a load card to simulate the isolation error in the system. This card typically consists of various high-voltage resistors and switches to simulate different error conditions (see Figure 3-5).
When building the isolation breakage load card, be sure to follow high-voltage class safety precautions and laboratory safety requirements. Choose the resistors (R) based on high battery voltage, power dissipation, and the testing targets of the system. Switches (SW) must withstand the open contact voltage and support proper insulation for handling the switches. Build the load card based on the resources available and number of tests planned. Users can also build the load card by using relays with external controls through a signal generator or software.
Be sure to take safety precautions as provided by a lab safety team when performing isolation breakage tests. The test setup must comply with regional safety norms. Connect the reference design to the load card, power supplies, and measurement equipment as shown in Figure 3-6. Use a signal generator to control the relays of the design board. If any one of the relays is closed, isolation is broken on the respective voltage divider (positive or negative potential divider) to support the isolation measurements. Set a constant low-voltage supply to 5 V as per the design. Use an oscilloscope to monitor the analog voltages of the reference design. As part of the measurements, some of the tests are done to calculate the errors. Use a 6½ digit multimeter (DMM) to support the same. Connect the high-voltage power supply to both the design and its load card. Perform measurements at different voltages and at multiple error points with variable resistance.
To measure isolation leakage currents, R1, R2, R3, R4, R5, and R6 of the design are not populated. R14, R15, R16, R17, and R18 are populated to have 1.2 MΩ. This same resistor chain is used for R21, R22, R23, R24, and R25 to maintain symmetry. 100-kΩ resistors are populated in the load card, which support as potential dividers from the high-voltage to low-voltage section.
Due to test facility limitations, some of the measurements are performed at low voltage and prorated data to high voltage. Functional behavior, isolation leakage currents for these tests are maintained intact with appropriate changes to resistors and power source.
For normal condition tests, there are no connections to the load card. This reference design is connected with both high-voltage and low-voltage power supplies. The high battery voltage was varied to measure the performance of analog circuit.
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CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
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CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
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CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
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CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
Table 3-1 lists the voltage measurements at different points of the board.
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) | MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100.006 | 2.505 | 2.295 | 2.714 |
150.008 | 2.504 | 2.19 | 2.819 |
200.003 | 2.504 | 2.086 | 2.923 |
250.004 | 2.504 | 1.982 | 3.027 |
300.004 | 2.504 | 1.878 | 3.131 |
350.004 | 2.504 | 1.774 | 3.235 |
400.006 | 2.504 | 1.669 | 3.34 |
450.007 | 2.504 | 1.565 | 3.444 |
Simulate an isolation error condition by connecting the chassis ground line to HV positive. Change the switches on the load card appropriately to support the same. To understand the behavior of error conditions, the measurements were performed at different battery voltages.
![]() | No resistance from positive line to chassis ground |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
![]() | 100-kΩ resistance from positive line to chassis ground |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) | MEASURED REFERENCE VOLTAGE | MEASURED PEAK ISO_POS VOLTAGE | MEASURED PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100.006 | 2.505 | 2.606 | 3.027 |
150.008 | 2.504 | 2.606 | 3.236 |
200.003 | 2.504 | 2.608 | 3.444 |
250.004 | 2.504 | 2.608 | 3.652 |
300.004 | 2.504 | 2.608 | 3.861 |
350.004 | 2.504 | 2.608 | 4.069 |
400.006 | 2.504 | 2.608 | 4.278 |
450.007 | 2.504 | 2.608 | 4.484 |
Figure 3-14 shows the deviations of HV POS and HV NEG ADC voltages from the normal conditions. HV POS is above the reference voltage when U6 (positive relay) is closed. This behavior is observable only when the HV positive line is low ohmic or short to chassis ground.
An error condition is created by connecting the HV negative line to chassis ground. To understand the behavior of error conditions, measurements were performed at different battery voltages.
![]() | No resistance from HV negative line to chassis ground |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
![]() | 100-kΩ resistance from positive line to chassis ground |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) | MEASURED REFERENCE VOLTAGE | MEASURED PEAK ISO_POS VOLTAGE | MEASURED PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100.006 | 2.505 | 2.191 | 2.61 |
150.008 | 2.504 | 1.982 | 2.61 |
200.003 | 2.504 | 1.774 | 2.61 |
250.004 | 2.504 | 1.565 | 2.61 |
300.004 | 2.504 | 1.357 | 2.61 |
350.004 | 2.504 | 1.148 | 2.61 |
400.006 | 2.504 | 0.939 | 2.61 |
450.007 | 2.504 | 0.731 | 2.61 |
Figure 3-17 shows the deviations of HV POS and HV NEG ADC voltages from the normal conditions. HV NEG ADC is slightly above the reference voltage and constant when U7 (negative relay) is closed. This behavior is observable only when the HV negative line is low ohmic or short to chassis ground.
An error condition is created at ¼ HV battery voltage to chassis ground. To understand the behavior of error conditions, measurements were performed at different battery voltages.
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Battery voltage = 400 V, isolation error = 100 V |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS |
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Battery voltage = 450 V, isolation error = 112.5 V |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS |
|
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | MEASURED PEAK ISO_POS VOLTAGE | MEASURED PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100.006 | 2.505 | 2.5 | 2.921 |
150.008 | 2.504 | 2.448 | 3.076 |
200.003 | 2.504 | 2.398 | 3.232 |
250.004 | 2.504 | 2.346 | 3.387 |
300.004 | 2.504 | 2.295 | 3.543 |
350.004 | 2.504 | 2.237 | 3.699 |
400.006 | 2.504 | 2.191 | 3.854 |
450.007 | 2.504 | 2.139 | 4.01 |
Figure 3-20 shows the deviations for POS ADC and NEG ADC voltages from normal conditions. POS and NEG are greater than expected and constant when relays are closed. This behavior resonates to an isolation error from the high-voltage section to chassis ground.
An error condition is created at ¾ HV battery voltage to chassis ground. To understand the behavior of error conditions, measurements were performed at different battery voltages.
![]() | Battery voltage = 400 V, isolation error = 300 V |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
![]() | Battery voltage = 450 V, isolation error = 337.5 V |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) | MEASURED REFERENCE VOLTAGE | MEASURED PEAK ISO_POS VOLTAGE | MEASURED PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100.006 | 2.505 | 2.294 | 2.715 |
150.008 | 2.504 | 2.139 | 2.767 |
200.003 | 2.504 | 1.984 | 2.82 |
250.004 | 2.504 | 1.828 | 2.873 |
300.004 | 2.504 | 1.672 | 2.925 |
350.004 | 2.504 | 1.526 | 2.978 |
400.006 | 2.504 | 1.362 | 3.031 |
450.007 | 2.504 | 1.206 | 3.084 |
Figure 3-23 shows the deviations for POS ADC and NEG ADC voltages from normal conditions. POS and NEG are less than expected and constant when relays are closed. This behavior resonates to an isolation error from the high-voltage section to chassis ground.
An error condition is created at the middle of the HV battery voltage to chassis ground. To understand the behavior of error conditions, measurements were performed at different battery voltages.
![]() | Battery voltage = 450 V, isolation error = 225 V |
CH1: ISO_POS CH2: ISO_NEG CH3: RELAY_NEG CH4: RELAY_POS | |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | MEASURED PEAK ISO_POS VOLTAGE | MEASURED PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100.006 | 2.505 | 2.398 | 2.817 |
150.008 | 2.504 | 2.295 | 2.921 |
200.003 | 2.504 | 2.191 | 3.025 |
250.004 | 2.504 | 2.088 | 3.129 |
300.004 | 2.504 | 1.98 | 3.233 |
350.004 | 2.504 | 1.876 | 3.338 |
400.006 | 2.504 | 1.778 | 3.442 |
450.007 | 2.504 | 1.667 | 3.537 |
Figure 3-25 shows the deviations for POS ADC and NEG ADC voltages from normal conditions. POS and NEG are slight different and constant when relays are closed. This behavior resonates to an isolation error from the high-voltage section to chassis ground.
The circuit behavior changes when there is an isolation error. Figure 3-26 shows more information about the type of isolation errors and the impacts at different battery voltages.
Follows same testing procedure as previous isolation test, uses solid-state relay instead of EMR, tests performed from 100 V-400 V.
Testing Images: CH1:ISO_NEG, CH2:ISO_POS, CH3: RELAY_POS, CH4: RELAY_NEG
For normal condition tests, there is no isolation leakage. This reference design is connected with both high-voltage and low-voltage power supplies. The high battery voltage was varied to measure the performance of analog circuit.
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.32 | 2.7456 |
200 |
2.499 | 2.109 | 2.9567 |
300 | 2.499 |
1.898 |
3.1676 |
400 |
2.499 |
1.687 | 3.3789 |
Simulate an isolation error condition by connecting the chassis ground line to HV positive. To understand the behavior of error conditions, the measurements were performed at different battery voltages.
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.542 | 2.9683 |
200 | 2.499 | 2.542 | 3.3904 |
300 | 2.499 | 2.542 | 3.8126 |
400 | 2.499 | 2.542 | 4.2352 |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.511 | 2.9364 |
200 | 2.499 | 2.481 | 3.3284 |
300 | 2.499 | 2.45 | 3.7204 |
400 | 2.499 | 2.42 | 4.1128 |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.118 | 2.5438 |
200 | 2.499 | 1.696 | 2.5437 |
300 | 2.499 | 1.274 | 2.5438 |
400 | 2.499 | 0.852 | 2.5438 |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.147 | 2.5736 |
200 | 2.499 | 1.755 | 2.6028 |
300 | 2.499 | 1.367 | 2.6327 |
400 | 2.499 | 0.971 | 2.6663 |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.423 | 2.8493 |
200 | 2.499 | 2.306 | 3.1543 |
300 | 2.499 | 2.189 | 3.4592 |
400 | 2.499 | 2.072 | 3.7645 |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.235 | 2.6604 |
200 | 2.499 | 2.101 | 2.9491 |
300 | 2.499 | 1.625 | 2.895 |
400 | 2.499 | 1.32 | 3.0125 |
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
MEASURED REFERENCE VOLTAGE | PEAK ISO_POS VOLTAGE | PEAK ISO_NEG VOLTAGE |
---|---|---|---|
100 | 2.499 | 2.329 | 2.7545 |
200 | 2.499 | 2.118 | 2.9658 |
300 | 2.499 | 1.907 | 3.1768 |
400 | 2.499 | 1.696 | 3.883 |
High-voltage measurements are done by populating R1, R2, R3, R4, R5, and R6. The total resistance measured from HV POS to HV NEG is 801 kΩ; this result includes a shunt resistance of 488 Ω. The typical gain stage of the AMC1301-Q1 is 8.1517.
HV BATTERY VOLTAGE (SUPPLIED AND MEASURED) |
EXPECTED OUTPUT OF OPA320-Q1 | MEASURED OUTPUT OF OPA320-Q1 | ERROR (%) |
---|---|---|---|
99.98 | 0.9947 | 0.9885 | 0.624 |
149.99 | 1.4926 | 1.4856 | 0.473 |
200.003 | 1.9905 | 1.9825 | 0.403 |
250 | 2.4884 | 2.4795 | 0.361 |
300 | 2.9863 | 2.9762 | 0.340 |
350 | 3.4842 | 3.473 | 0.322 |
400 | 3.9820 | 3.97 | 0.303 |
450 | 4.4799 | 4.4668 | 0.293 |
500 | 4.9777 | 4.948 | 0.598 |
Multiple factors influence the calculations of high voltage. MELF resistors tolerance, bias currents, and offset voltages of analog components are important sources for the error. Consider the same for lifetime error calculations and design accordingly. MELF resistors must be chosen for low drift in resistance for temperature and aging factors.
Figure 3-36 remains true if there are no capacitors between high-voltage lines to chassis ground.
By using Figure 3-36, the designer can identify the type of isolation error in the HEV or EV system. First, identify the isolation error. To classify the severity of the error, perform an analysis to implement the prevention mechanisms. Calculating the isolation leakage current can be complex if using capacitors from high-voltage lines to the chassis ground, which is a step to improve the electromagnetic compatibility (EMC) of the system. Maintain the look-up table or equations for the expected isolation voltages and leakage currents, which change to temperature. Highly precise analog components must be used for measurement circuits to identify and analyze isolation errors.
Isolation error analysis is done based on the requirements from original equipment manufacturers (OEMs), safety goals, and algorithms. This design guide is limited in analyzing the circuit and explaining the error calculations. The error handling part is left to the manufacturers.
The following measurements were taken with this reference design at various high voltages and under different error conditions:
HIGH VOLTAGE | CALCULATED / EXPECTED | MEASURED | ACCURACY | ||||||
---|---|---|---|---|---|---|---|---|---|
ISO_POS (V) | ISO_NEG (V) | LEAKAGE CURRENT (mA) | ISO_POS (V) | ISO_NEG (V) | LEAKAGE CURRENT (mA) | ISO_POS (%) | ISO_NEG (%) | LEAKAGE CURRENT (%) | |
100.006 | 2.293 | 2.714 | 0.042 | 2.295 | 2.714 | 0.0419 | -0.087 | 0.000 | 0.238 |
150.008 | 2.188 | 2.819 | 0.063 | 2.19 | 2.819 | 0.0629 | -0.091 | 0.000 | 0.159 |
200.003 | 2.083 | 2.924 | 0.084 | 2.086 | 2.923 | 0.0837 | -0.144 | 0.034 | 0.357 |
250.004 | 1.978 | 3.029 | 0.105 | 1.982 | 3.027 | 0.104 | -0.202 | 0.066 | 0.476 |
300.004 | 1.873 | 3.134 | 0.126 | 1.878 | 3.131 | 0.125 | -0.267 | 0.096 | 0.556 |
350.004 | 1.768 | 3.239 | 0.147 | 1.774 | 3.235 | 0.146 | -0.339 | 0.123 | 0.612 |
400.006 | 1.663 | 3.344 | 0.168 | 1.669 | 3.34 | 0.167 | -0.361 | 0.120 | 0.536 |
450.007 | 1.558 | 3.449 | 0.189 | 1.565 | 3.444 | 0.1879 | -0.449 | 0.145 | 0.582 |
As per Figure 3-36 and measurements, the isolation leakage identification is quite straightforward with the isolation error at HV positive or HV negative. Complexity arises when an isolation error is in between the high-voltage positive and negative lines. For the sake of testing this reference design, a potential divider load card is used for isolation error in between battery voltages. The performance of the results shown for these tests may differ to the actual tests for the middle-voltage isolation error, which is one of the less probable errors. The following analysis in Figure 3-38 helps to find the leakage current if there is an isolation error in the middle of the battery.
Isolation resistance (Riso) and isolation voltage (Viso) can be calculated easily by using the voltages measured before and after closing the switches S1 and S2. Leakage current can be calculated with both isolation error voltage and resistance. When only S1 is closed, the HV_Batt - Vref - Viso voltage is confirmed to be across resistors Riso , Rps1, and Rps2 (neglect bias currents); leakage current can be measured from ISO_POS. When only S2 is closed, the Viso-Vref voltage is confirmed to be across Rns1, Rns2, and Riso, which can be measured from ISO_NEG. By design, resistors Rps1 and Rps2 are the same as Rns1 and Rns2. By using both equations, Riso and Viso can be calculated easily.
In summary, this reference provides a flow chart to monitor the isolation leakage from high voltage to chassis grounds in HEV and EV motors. If the error condition is identified, equations provided in this design guide support the diagnoses of the isolation voltage, isolation resistance, and isolation leakage currents.
To download the schematics, see the design files at TIDA-01513.
To download the bill of materials (BOM), see the design files at TIDA-01513.
The PCB layout for isolation leakage current measurements must be based on the requirements and components selected for the design.
To download the layer plots, see the design files at TIDA-01513.
To download the Altium project files, see the design files at TIDA-01513.
To download the Gerber files, see the design files at TIDA-01513.
To download the assembly drawings, see the design files at TIDA-01513.
To download the software files, see the design files at TIDA-01513.
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Changes from Revision A (August 2022) to Revision B (January 2023)
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