JAJU528B August   2022  – January 2023 OPA388-Q1

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagrams
    2. 2.2 Highlighted Products
      1. 2.2.1 TPSI2140-Q1
      2. 2.2.2 AMC1301-Q1
      3. 2.2.3 SN6501-Q1
    3. 2.3 System Design Theory
      1. 2.3.1 Isolation Leakage Current Theory
      2. 2.3.2 High-Voltage Measurement
  8. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Required Hardware
    2.     Hardware with Solid-State Relay
    3. 3.2 Testing and Results
      1. 3.2.1 Test Setup
      2. 3.2.2 Isolation Tests
        1. 3.2.2.1 Normal Conditions
        2. 3.2.2.2 Isolation Error at HV Positive
        3. 3.2.2.3 Isolation Error at HV Negative
        4. 3.2.2.4 Isolation Error at ¼ HV Battery Voltage
        5. 3.2.2.5 Isolation Error at ¾ HV Battery Voltage
        6. 3.2.2.6 Isolation Error at the Middle of an HV Battery Voltage
      3. 3.2.3 Solid-State Relay Isolation Tests
        1. 3.2.3.1 Normal Conditions
        2. 3.2.3.2 Isolation Error at HV Positive
        3. 3.2.3.3 Isolation Error at HV Negative
        4. 3.2.3.4 Isolation Error at ¼ HV Battery Voltage
        5. 3.2.3.5 Isolation Error at ¾ HV Battery Voltage
        6. 3.2.3.6 Isolation Error at the Middle of an HV Battery Voltage
      4. 3.2.4 High Voltage Measurements
      5. 3.2.5 Isolation Measurement Analysis
      6. 3.2.6 Error Analysis
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
  12. 7Trademarks
  13. 8Revision History

3.2.6 Error Analysis

Isolation error analysis is done based on the requirements from original equipment manufacturers (OEMs), safety goals, and algorithms. This design guide is limited in analyzing the circuit and explaining the error calculations. The error handling part is left to the manufacturers.

The following measurements were taken with this reference design at various high voltages and under different error conditions:

  • Feedback resistor R9, R12 = 5 kΩ
  • Series resistance (Pin 3 of relay to input of POS/NEG op amp) = 10 kΩ
  • Series resistance (Pin 5 of relay to input of HV POS/HV NEG) = 1.18 MΩ
  • Reference voltage (VREF2.5V) = 2.504 V
  • C17 and C22 are not populated
Table 3-16 Isolation Error Analysis
HIGH VOLTAGE CALCULATED / EXPECTED MEASURED ACCURACY
ISO_POS (V) ISO_NEG (V) LEAKAGE CURRENT (mA) ISO_POS (V) ISO_NEG (V) LEAKAGE CURRENT (mA) ISO_POS (%) ISO_NEG (%) LEAKAGE CURRENT (%)
100.006 2.293 2.714 0.042 2.295 2.714 0.0419 -0.087 0.000 0.238
150.008 2.188 2.819 0.063 2.19 2.819 0.0629 -0.091 0.000 0.159
200.003 2.083 2.924 0.084 2.086 2.923 0.0837 -0.144 0.034 0.357
250.004 1.978 3.029 0.105 1.982 3.027 0.104 -0.202 0.066 0.476
300.004 1.873 3.134 0.126 1.878 3.131 0.125 -0.267 0.096 0.556
350.004 1.768 3.239 0.147 1.774 3.235 0.146 -0.339 0.123 0.612
400.006 1.663 3.344 0.168 1.669 3.34 0.167 -0.361 0.120 0.536
450.007 1.558 3.449 0.189 1.565 3.444 0.1879 -0.449 0.145 0.582
GUID-763E0EF2-99A0-4276-82F1-3FF04781653A-low.gif Figure 3-37 Accuracy of Isolation Measurements

As per Figure 3-36 and measurements, the isolation leakage identification is quite straightforward with the isolation error at HV positive or HV negative. Complexity arises when an isolation error is in between the high-voltage positive and negative lines. For the sake of testing this reference design, a potential divider load card is used for isolation error in between battery voltages. The performance of the results shown for these tests may differ to the actual tests for the middle-voltage isolation error, which is one of the less probable errors. The following analysis in Figure 3-38 helps to find the leakage current if there is an isolation error in the middle of the battery.

GUID-C45CBA24-855C-483D-8EA2-A2E2832BF5FE-low.gif Figure 3-38 Isolation Error at Middle of Battery

Isolation resistance (Riso) and isolation voltage (Viso) can be calculated easily by using the voltages measured before and after closing the switches S1 and S2. Leakage current can be calculated with both isolation error voltage and resistance. When only S1 is closed, the HV_Batt - Vref - Viso voltage is confirmed to be across resistors Riso , Rps1, and Rps2 (neglect bias currents); leakage current can be measured from ISO_POS. When only S2 is closed, the Viso-Vref voltage is confirmed to be across Rns1, Rns2, and Riso, which can be measured from ISO_NEG. By design, resistors Rps1 and Rps2 are the same as Rns1 and Rns2. By using both equations, Riso and Viso can be calculated easily.

In summary, this reference provides a flow chart to monitor the isolation leakage from high voltage to chassis grounds in HEV and EV motors. If the error condition is identified, equations provided in this design guide support the diagnoses of the isolation voltage, isolation resistance, and isolation leakage currents.