JAJU528B August   2022  – January 2023 OPA388-Q1

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagrams
    2. 2.2 Highlighted Products
      1. 2.2.1 TPSI2140-Q1
      2. 2.2.2 AMC1301-Q1
      3. 2.2.3 SN6501-Q1
    3. 2.3 System Design Theory
      1. 2.3.1 Isolation Leakage Current Theory
      2. 2.3.2 High-Voltage Measurement
  8. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Required Hardware
    2.     Hardware with Solid-State Relay
    3. 3.2 Testing and Results
      1. 3.2.1 Test Setup
      2. 3.2.2 Isolation Tests
        1. 3.2.2.1 Normal Conditions
        2. 3.2.2.2 Isolation Error at HV Positive
        3. 3.2.2.3 Isolation Error at HV Negative
        4. 3.2.2.4 Isolation Error at ¼ HV Battery Voltage
        5. 3.2.2.5 Isolation Error at ¾ HV Battery Voltage
        6. 3.2.2.6 Isolation Error at the Middle of an HV Battery Voltage
      3. 3.2.3 Solid-State Relay Isolation Tests
        1. 3.2.3.1 Normal Conditions
        2. 3.2.3.2 Isolation Error at HV Positive
        3. 3.2.3.3 Isolation Error at HV Negative
        4. 3.2.3.4 Isolation Error at ¼ HV Battery Voltage
        5. 3.2.3.5 Isolation Error at ¾ HV Battery Voltage
        6. 3.2.3.6 Isolation Error at the Middle of an HV Battery Voltage
      4. 3.2.4 High Voltage Measurements
      5. 3.2.5 Isolation Measurement Analysis
      6. 3.2.6 Error Analysis
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
  12. 7Trademarks
  13. 8Revision History

SN6501-Q1

The SN6501-Q1 is a transformer driver designed for low-cost, small form-factor, isolated DC/DC converters using push-pull topology. The device includes an oscillator that feeds a gate drive circuit. The gate drive, comprising a frequency divider and a break-before-make (BBM) logic, provides two complementary output signals that alternately turn the two output transistors ON and OFF. The output frequency of the oscillator is divided down by an asynchronous divider that provides two complementary output signals with a 50% duty cycle. A subsequent BBM logic inserts a dead time between the high-pulses of the two signals. The resulting output signals present the gate-drive signals for the output transistors. As shown in Figure 2-5, before either one of the gates can assume logic high, there must be a short time period during which both signals are low and both transistors are high impedance. Known as BBM time, this short period is required to avoid shorting out both ends of the primary.

GUID-FA9D9312-987F-4196-BB78-639A90B15840-low.gif Figure 2-5 SN6501-Q1 Block Diagram

Key features include:

  • AEC-Q100 qualified with –40°C to +125°C ambient operating temperature
  • Push-pull driver for small transformers
  • High primary-side current drive, 5-V supply: 350 mA (max)
  • High primary-side current drive, 3.3-V supply: 150 mA (max)
  • Low ripple on rectified output permits small output capacitors
  • Small 5-pin SOT-23 package