JAJU808 July   2021

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1  System Control and Processing
      2. 2.2.2  Analog Front End
      3. 2.2.3  Input Voltage Monitoring: 5 V, 20 V, 40 V, and ±5 V
      4. 2.2.4  Bidirectional Current Sense: ±2 A
      5. 2.2.5  Unipolar Current Sense: 0.25 A to 1 A
      6. 2.2.6  TMP461-SP: Local and Remote Temperature Sensing
      7. 2.2.7  NTC Thermistor Temperature Sensing
      8. 2.2.8  Adjustable Voltage Source
      9. 2.2.9  Fixed Output Current Source
      10. 2.2.10 Adjustable 4-mA Current Source
      11. 2.2.11 Power Tree and Power Sequencing
    3. 2.3 Highlighted Products
      1. 2.3.1  MSP430FR5969-SP
      2. 2.3.2  ADC128S102QML-SP
      3. 2.3.3  DAC121S101QML-SP
      4. 2.3.4  LMP7704-SP
      5. 2.3.5  INA901-SP
      6. 2.3.6  LM4050QML-SP
      7. 2.3.7  LM158QML-SP
      8. 2.3.8  LM139QML-SP
      9. 2.3.9  TMP461-SP
      10. 2.3.10 TPS7A4501-SP
      11. 2.3.11 TPS7H2201-SP
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Test Setup
      1. 3.2.1 Voltage Monitor Test Setup
      2. 3.2.2 Current Monitor Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Voltage Measurement - Noise Floor Results
      2. 3.3.2 Voltage Measurement - Linearity Results
      3. 3.3.3 Current Measurement - Noise Floor Results
      4. 3.3.4 Current Measurement - Linearity Results
      5. 3.3.5 Analog Outputs
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 サポート・リソース
    4. 4.4 Trademarks
  10. 5About the Author

2.3.2 ADC128S102QML-SP

The ADC128S102 device is a low-power, eight channel CMOS 12-bit analog-to-digital converter specified for conversion throughput rates of 50 kSPS to 1 MSPS. The converter is based on successive approximation register architecture with an internal track-and-hold circuit. The device can be configured to accept up to eight input signals at inputs IN0 through IN7. The output serial data is straight binary and is compatible with several standards, such as SPI, QSPI, MICROWIRE, and many common DSP serial interfaces. The ADC128S102 may be operated with independent analog and digital supplies. The analog supply (VA) can range from 2.7 V to 5.25V, and the digital supply (VD) can range from 2.7 V to VA. Normal power consumption using a 3-V or 5-V supply is 2.3 mW and 10.7 mW, respectively. The power-down feature reduces the power consumption to 0.06 μW using a 3-V supply and 0.25 μW using a 5-V supply