JAJU812 March   2021

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Multichannel SSR with Independent Isolation Between SSR Channels
      2. 2.2.2 Design Challenge With Single Isolation
      3. 2.2.3 Multichannel SSR Drive With Single Isolation Multichannel Digital Isolator
      4. 2.2.4 Need of High-Impedance Voltage Translator
      5. 2.2.5 Design to Minimize Cross-Coupling and MOSFET Gate Pick up Due to Other SSR Switching
      6. 2.2.6 Schematic: Design of Gate-Drive Circuit
        1. 2.2.6.1 Calculation of Gate-Driver Power Consumption
      7. 2.2.7 Schematic: Digital Isolator Circuit
      8. 2.2.8 Schematic: 3.3 V to 10V_ISO, 5V_ISO Power Supply
    3. 2.3 Highlighted Products
      1. 2.3.1 ISO7760
      2. 2.3.2 ISO7740
      3. 2.3.3 ISO7041
      4. 2.3.4 CSD19538Q2
      5. 2.3.5 CSD17382F4
      6. 2.3.6 TPL7407LA
      7. 2.3.7 TLV760
      8. 2.3.8 TLC555
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Test Equipment Needed to Validate Board
      2. 3.1.2 Test Conditions
      3. 3.1.3 Test Procedure
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Functional Tests
      2. 3.3.2 Overcurrent Testing With External Fuse
      3. 3.3.3 Surge Testing
      4. 3.3.4 Multichannel SSR Driven From Two 24-VAC Transformers
      5. 3.3.5 Alternate SSR Topology for High Voltage
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 サポート・リソース
    4. 4.4 Trademarks
  10. 5About the Author

3.1.3 Test Procedure

The following list details the procedure for board bring-up and testing:

  1. Remove all the connections from the board. Apply a minimum 3.6-V DC to the 5-V DC terminal of the connector J1. Set the current limit to around 200 mA for the DC power supply.
  2. Check the 3.3 V at any 3V3 node in the board (for example: at capacitor C4).
  3. Check the PWM frequency at the output of the TIMER (at R15) or from the MCU. The board is tuned to work at 250 kHz and 34% duty cycle. The board uses the onboard PWM from the TIMER, and so external PWM signal is not needed. However if an external PWM signal (for example from an external microcontroller) is to be used, then the PWM signal can be connected to J3 with R26 populated and remove R15.
  4. Check the voltage at the output of flyback at 10V_ISO node (in the schematic, the 12V_ISO node). The expected readings are listed in Table 3-1. The LED D5 will light up on the availability of 10V_ISO. The voltage at the node 10V_ISO is expected to be more than 6.5 V at full load (all channels ON).
  5. Check the availability of 5-V isolated power at the node 5V_ISO.
  6. For testing the relay coils, switch off the supply at J1. Connect 24–41 VDC supply at J4 (between RC and C with any polarity) and set a current limit based on the expected relay current (for ex: 1 A)
  7. Connect the relay coils between the Sx (S1 to S10) pin to the pin marked “C”, as shown in Figure 3-1.
  8. The ON/OFF signals can be given to the board at J2 and J3 at the pins marked IN1 to IN10, from an external controller or function generator. The logic voltage applied at IN1–IN10 pins must be less than 3.3 V.
  9. Turn on the low-voltage supply at J1 and the 24V - 41 VDC supply at J4. Observe the relay switching according to the signal at INx.
  10. Repeat the test (steps 7–9) with 24 - 41 VDC supply polarity reversed.
  11. Repeat the test (steps 7–9) with 24-V AC supply connected at J4. Make sure that a properly-rated external fuse is used in series with the 24-VAC supply to avoid transformer saturation and further heating, if any unexpected short circuit occurs.