JAJU835 December   2021

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
      1.      10
    2. 2.2 Highlighted Products
      1. 2.2.1 DRV5056
      2. 2.2.2 DRV5032
      3. 2.2.3 TPS709
      4. 2.2.4 SN74HCS00
      5. 2.2.5 TPS22917
      6. 2.2.6 SN74AUP1G00
      7. 2.2.7 TLV9061
    3. 2.3 Design Considerations
      1. 2.3.1 Design Hardware Implementation
        1. 2.3.1.1 Hall-Effect Switches
          1. 2.3.1.1.1 U1 Wake-Up Sensor Configuration
          2. 2.3.1.1.2 U2 Stray-Field Sensor Configuration
          3. 2.3.1.1.3 U3 and U4 Tamper Sensor Configuration
          4. 2.3.1.1.4 Hall Switch Placement
            1. 2.3.1.1.4.1 Placement of U1 and U2 Sensors
              1. 2.3.1.1.4.1.1 U1 and U2 Magnetic Flux Density Estimation Results
            2. 2.3.1.1.4.2 Placement of U3 and U4 Hall Switches
              1. 2.3.1.1.4.2.1 U3 and U4 Magnetic Flux Density Estimation Results
          5. 2.3.1.1.5 Using Logic Gates to Combine Outputs from Hall-Effect Switches
        2. 2.3.1.2 Linear Hall-Effect Sensor Output
          1. 2.3.1.2.1 DRV5056 Power
          2. 2.3.1.2.2 DRV5056 Output Voltage
          3. 2.3.1.2.3 DRV5056 Placement
        3. 2.3.1.3 Power Supply
        4. 2.3.1.4 Transistor Circuit for Creating High-Voltage Enable Signal
      2. 2.3.2 Alternative Implementations
        1. 2.3.2.1 Replacing 20-Hz Tamper Switches With 5-Hz Tamper Switches
        2. 2.3.2.2 Using Shielding to Replace Tamper Switches and Stray Field Switch
        3. 2.3.2.3 Replacing Hall-Based Wake-Up Alert Function With a Mechanical Switch
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Installation and Demonstration Instructions
      2. 3.1.2 Test Points and LEDs
      3. 3.1.3 Configuration Options
        1. 3.1.3.1 Disabling Hall-Effect Switches
        2. 3.1.3.2 Configuring Hardware for Standalone Mode or Connection to External Systems
    2. 3.2 Test Setup
      1. 3.2.1 Output Voltage Accuracy Testing
      2. 3.2.2 Magnetic Tampering Testing
      3. 3.2.3 Current Consumption Testing
    3. 3.3 Test Results
      1. 3.3.1 Output Voltage Accuracy Pre-Calibration Results
      2. 3.3.2 Output Voltage Accuracy Post-Calibration Results
      3. 3.3.3 Magnetic Tampering Results
      4. 3.3.4 Current Consumption Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 サポート・リソース
    5. 4.5 Trademarks

3.1.3.2 Configuring Hardware for Standalone Mode or Connection to External Systems

This design can operate in standalone mode (this is the default configuration), which does not need to be connected to an external system, or some of the signals from the design can be connected to an external signal.

In standalone mode, the trigger LED is mainly used to indicate how far the trigger is pressed. To configure the design for full standalone mode, use the following configuration:

  • Ensure that a 0-Ω resistor is on pads 2 and 3 of the 3-pad R14 footprint. This configures the design to operate off the batteries placed in the battery holder.
  • Ensure that a 0-Ω resistor is at R22. This allows the DRV5056 to be powered when the trigger is pressed and unpowered when the trigger is not pressed.
  • Ensure that a 0-Ω resistor is at R5 so that the brightness of the TRIG LED changes based on how far the trigger is pressed.

The design also has various options to support connecting to an external system, including the following:

  • Operation from an external power supply, such as an 18-V cordless power tool battery: To operate from an external power supply, ensure that a 0-Ω resistor is on pads 1 and 2 of the 3-pad R14 footprint. The positive terminal of the power supply is connected to the LDOIN test point and the negative terminal of the power supply is connected to any of the GND test points.
  • Powering the DRV5056 from an external power supply: The DRV5056 can be powered from an external power supply. An example use-case is when the DRV5056 will be powered from an external voltage rail that is switched ON or OFF based on whether the external system should be in sleep mode or active mode. Another use-case is for powering the DRV5056 from the same VCC voltage rail that powers the ADC that measures the output voltage of the DRV5056. The DRV5056 uses a ratiometric architecture that can reduce error from VCC tolerance when the external analog-to-digital converter (ADC) uses the same VCC for its reference, so connecting the ADC VCC to the DRV5056 can reduce error. To power the DRV5056 from an external power supply, remove the resistor at R22 so that the DRV5056 is not powered through the TPS22917. Next, connect the positive terminal of the external power supply to the VCC_2 test point and the negative terminal of the power supply to any of the GND test points. To power the DRV5056, the power supply must be at either 3 V to 3.6 V or 4.5 to 5.5 V. In addition, the power supply must be able to power a 10-mA load.
  • Connecting the DRV5056 output to an external system: The DRV5056 can be connected to an external system by removing resistor R5. By doing this, note that the op-amp circuit is disabled and the TRIG LED does not change its brightness based on how far the trigger is pressed; however, the DRV5056 still changes based on how far the trigger is pressed. If desired, resistors R10 and R11 can also be populated to scale down the output voltage from the DRV5056, which allows the DRV5056 output to be scaled down to match the input voltage of ADCs with a relatively small input voltage range. The undivided DRV5056 output voltage is available on the LIN test point and the scaled down voltage is available on the DIV test point. In addition to connecting to the LIN or DIV test points to the external system, the GND of this design should also be connected to the GND of the external system.
  • Providing wake-up signal to an external system (enable signal option 2): The design has a transistor circuit that translates the wake-up signal used internally in the design (enable signal option 1) into a wake-up signal that is used externally (enable signal option 2). One use-case for this is for interfacing to external systems that require a system wake-up signal that is shorted to the battery whenever the system should be in active mode and disconnected from the battery when the system is in sleep mode. The transistor circuit can emulate connecting and disconnecting the battery to a wake-up signal within the external system. By default, the circuit for enable signal option 2 is not populated in this design. So to use this option, R24, Q1, and R15 must be populated. After populating these components, the voltage that the signal is referenced to should be applied to the BV test point. As an example, connect this high-voltage input to the power drill battery to create an enable signal that is referenced with respect to the battery in the drill. The output signal is produced on the BO test point. BO equals 0 V when the system is in sleep mode and it equals the voltage set at BV when the system is in active mode. Note that the produced enable signal is not meant to power anything that draws a lot of current. Enable signal option 2 is primarily intended to trigger other components that actually connect or disconnect power to the system, such as an external high current eFuse, load switch, or hot-swap controller.