JAJU835 December   2021

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
      1.      10
    2. 2.2 Highlighted Products
      1. 2.2.1 DRV5056
      2. 2.2.2 DRV5032
      3. 2.2.3 TPS709
      4. 2.2.4 SN74HCS00
      5. 2.2.5 TPS22917
      6. 2.2.6 SN74AUP1G00
      7. 2.2.7 TLV9061
    3. 2.3 Design Considerations
      1. 2.3.1 Design Hardware Implementation
        1. 2.3.1.1 Hall-Effect Switches
          1. 2.3.1.1.1 U1 Wake-Up Sensor Configuration
          2. 2.3.1.1.2 U2 Stray-Field Sensor Configuration
          3. 2.3.1.1.3 U3 and U4 Tamper Sensor Configuration
          4. 2.3.1.1.4 Hall Switch Placement
            1. 2.3.1.1.4.1 Placement of U1 and U2 Sensors
              1. 2.3.1.1.4.1.1 U1 and U2 Magnetic Flux Density Estimation Results
            2. 2.3.1.1.4.2 Placement of U3 and U4 Hall Switches
              1. 2.3.1.1.4.2.1 U3 and U4 Magnetic Flux Density Estimation Results
          5. 2.3.1.1.5 Using Logic Gates to Combine Outputs from Hall-Effect Switches
        2. 2.3.1.2 Linear Hall-Effect Sensor Output
          1. 2.3.1.2.1 DRV5056 Power
          2. 2.3.1.2.2 DRV5056 Output Voltage
          3. 2.3.1.2.3 DRV5056 Placement
        3. 2.3.1.3 Power Supply
        4. 2.3.1.4 Transistor Circuit for Creating High-Voltage Enable Signal
      2. 2.3.2 Alternative Implementations
        1. 2.3.2.1 Replacing 20-Hz Tamper Switches With 5-Hz Tamper Switches
        2. 2.3.2.2 Using Shielding to Replace Tamper Switches and Stray Field Switch
        3. 2.3.2.3 Replacing Hall-Based Wake-Up Alert Function With a Mechanical Switch
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Installation and Demonstration Instructions
      2. 3.1.2 Test Points and LEDs
      3. 3.1.3 Configuration Options
        1. 3.1.3.1 Disabling Hall-Effect Switches
        2. 3.1.3.2 Configuring Hardware for Standalone Mode or Connection to External Systems
    2. 3.2 Test Setup
      1. 3.2.1 Output Voltage Accuracy Testing
      2. 3.2.2 Magnetic Tampering Testing
      3. 3.2.3 Current Consumption Testing
    3. 3.3 Test Results
      1. 3.3.1 Output Voltage Accuracy Pre-Calibration Results
      2. 3.3.2 Output Voltage Accuracy Post-Calibration Results
      3. 3.3.3 Magnetic Tampering Results
      4. 3.3.4 Current Consumption Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 サポート・リソース
    5. 4.5 Trademarks

3.3.4 Current Consumption Results

Table 3-4 Current Consumption Under Different Conditions
CONDITIONCURRENT FOR
5 V AT LDOIN		CURRENT FOR
18 V AT LDOIN		CURRENT FOR
3.3 V AT VCC

1: BJT optional circuit and LEDs removed
(Everything else on the board is still enabled; current is measured at LDOIN)

6.578 μA6.946 μA–

2: Condition 1 + tamper sensor 1 disabled
(Current is measured at LDOIN)

4.816 μA5.229 μA–

3: Condition 2 + tamper sensor 2 disabled
(Current is measured at LDOIN)

3.112 μA3.427 μA–

4: Condition 3 + Stray field sensor disabled
(Current is measured at LDOIN)

3.076 μA3.459 μA–
5: Condition 3 + LDO disabled
(Wake-up Hall sensor, load switch, 4-channel NAND gate, and 1-channel NAND gate are still enabled; current measured at VCC)		––1.67 μA
Based on the desired level of protection against external magnetic fields and the system current consumption requirements, select which tamper and stray field sensors should be enabled. See Section 2.3.2 for additional optimizations that can be done to reduce system current consumption.