JAJU835 December   2021

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
      1.      10
    2. 2.2 Highlighted Products
      1. 2.2.1 DRV5056
      2. 2.2.2 DRV5032
      3. 2.2.3 TPS709
      4. 2.2.4 SN74HCS00
      5. 2.2.5 TPS22917
      6. 2.2.6 SN74AUP1G00
      7. 2.2.7 TLV9061
    3. 2.3 Design Considerations
      1. 2.3.1 Design Hardware Implementation
        1. 2.3.1.1 Hall-Effect Switches
          1. 2.3.1.1.1 U1 Wake-Up Sensor Configuration
          2. 2.3.1.1.2 U2 Stray-Field Sensor Configuration
          3. 2.3.1.1.3 U3 and U4 Tamper Sensor Configuration
          4. 2.3.1.1.4 Hall Switch Placement
            1. 2.3.1.1.4.1 Placement of U1 and U2 Sensors
              1. 2.3.1.1.4.1.1 U1 and U2 Magnetic Flux Density Estimation Results
            2. 2.3.1.1.4.2 Placement of U3 and U4 Hall Switches
              1. 2.3.1.1.4.2.1 U3 and U4 Magnetic Flux Density Estimation Results
          5. 2.3.1.1.5 Using Logic Gates to Combine Outputs from Hall-Effect Switches
        2. 2.3.1.2 Linear Hall-Effect Sensor Output
          1. 2.3.1.2.1 DRV5056 Power
          2. 2.3.1.2.2 DRV5056 Output Voltage
          3. 2.3.1.2.3 DRV5056 Placement
        3. 2.3.1.3 Power Supply
        4. 2.3.1.4 Transistor Circuit for Creating High-Voltage Enable Signal
      2. 2.3.2 Alternative Implementations
        1. 2.3.2.1 Replacing 20-Hz Tamper Switches With 5-Hz Tamper Switches
        2. 2.3.2.2 Using Shielding to Replace Tamper Switches and Stray Field Switch
        3. 2.3.2.3 Replacing Hall-Based Wake-Up Alert Function With a Mechanical Switch
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Installation and Demonstration Instructions
      2. 3.1.2 Test Points and LEDs
      3. 3.1.3 Configuration Options
        1. 3.1.3.1 Disabling Hall-Effect Switches
        2. 3.1.3.2 Configuring Hardware for Standalone Mode or Connection to External Systems
    2. 3.2 Test Setup
      1. 3.2.1 Output Voltage Accuracy Testing
      2. 3.2.2 Magnetic Tampering Testing
      3. 3.2.3 Current Consumption Testing
    3. 3.3 Test Results
      1. 3.3.1 Output Voltage Accuracy Pre-Calibration Results
      2. 3.3.2 Output Voltage Accuracy Post-Calibration Results
      3. 3.3.3 Magnetic Tampering Results
      4. 3.3.4 Current Consumption Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 サポート・リソース
    5. 4.5 Trademarks

2.3.2.1 Replacing 20-Hz Tamper Switches With 5-Hz Tamper Switches

In this reference design, the SOT-23 version of the DRV5032FA device variant is used for switches U3 and U4; however, if the response time of the tamper Hall sensors is not important, these switches can be replaced with the SOT-23 version of the DRV5032FB device variant for a reduced current consumption. The SOT-23 packages of these two device variants only vary in terms of sampling rate; the other device parameters are the same.

Figure 2-28 shows the typical magnetic sampling period and average current consumption of the FA and FB devices from the data sheet. The response time of the DRV5032FB is 200 ms compared to the 50 ms response time of the DRV5032FA. In systems that can use a tamper sensor that has a 200 ms response time, using the DRV5032FB can reduce the typical average current consumption of each Hall sensor from 1.6 µA to 0.7 µA. As a result, using the DRV5032FB for both U3 and U4 can reduce the sleep current consumption of the design by up to 1.8 µA.

GUID-20211201-SS0I-FLWS-GFK0-4RKXVVRMNBZB-low.png Figure 2-28 Current Consumption of Different DRV5032 Variants