JAJU854 September 2022
In certain applications, these FPGAs are used on VPX cards which have a limited amount of space in all three dimensions. The layout of the design must fit within the 100-mm × 100-mm space of VPX cards. The Z axis is another constraint, with both passive component and ICs needing to be less than < 5 mm. This allows additional room for heat sinks and better cooling for VPX cards that are already slotted very closely with each other. Furthermore, this design needs to have flexibility in the rail assignment and sequence to match up to a wide variety of Intel and Xilinx power supplies.