JAJU871 December   2022

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Theory of Operation
    4. 2.4 Highlighted Products
      1. 2.4.1 TPS7A57 Low Dropout (LDO) Regulator
      2. 2.4.2 LMG1020 Low Side Driver
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
      1. 3.2.1 Optional Load Transient Circuit Operation
    3. 3.3 Test Results
      1. 3.3.1 Current Sharing
      2. 3.3.2 VLOAD vs ILOAD
      3. 3.3.3 Load Transient Response
      4. 3.3.4 Current Limit
      5. 3.3.5 Startup
      6. 3.3.6 Noise
      7. 3.3.7 PSRR
      8. 3.3.8 Thermal
      9. 3.3.9 Thermal Limit Protection
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 サポート・リソース
    5. 4.5 Trademarks
  10. 5About the Author

PSRR

GUID-20221116-SS0I-PMCC-1ZPJ-ZS0DLK0JLR6S-low.png
VIN= 1.05 V
Figure 3-20 3x LDOs in Parallel: PSRR vs. Frequency and IOUT
GUID-20221116-SS0I-5VNB-N0SJ-TTHH7WSVVFN1-low.png
VIN= 1.05 V
Figure 3-21 PSRR vs. Frequency and IOUT for 3x Parallel TPS7A57 and 1x Single TPS7A57